Patents by Inventor Donald J. Roy

Donald J. Roy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180185229
    Abstract: A cremation urn comprising an internal structure with an opening, an external opening with an opening that is correspondingly aligned with the opening on the internal structure, and sealing means in the form of a threaded lid or press fit lid. A threaded flange is attached to the opening on the internal structure and is molded into the urn during manufacturing. The materials used for the urn produce an urn with the appearance of marble. Once the urn is made, by use of a manufacturing method, the threaded lid is screwed into the threaded flange, thereby creating a one-piece, air-tight and water-tight cremation urn.
    Type: Application
    Filed: October 30, 2017
    Publication date: July 5, 2018
    Inventor: Donald J. Roy
  • Patent number: 9775760
    Abstract: A cremation urn comprising an internal structure with an opening, an external opening with an opening that is correspondingly aligned with the opening on the internal structure, and sealing means in the form of a threaded lid or press fit lid. A threaded flange is attached to the opening on the internal structure and is molded into the urn during manufacturing. The materials used for the urn produce an urn with the appearance of marble. Once the urn is made, by use of a manufacturing method, the threaded lid is screwed into the threaded flange, thereby creating a one-piece, air-tight and water-tight cremation urn.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: October 3, 2017
    Inventor: Donald J. Roy
  • Patent number: 6700158
    Abstract: A method of making a trench MOSFET structure having upper trench corner protection, the method not requiring trench corner rounding or sacrificial oxide/strip steps. The trench MOSFET structure fabricated according to the method of the present invention exhibits higher oxide breakdown voltage and lower gate-to-source capacitance.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: March 2, 2004
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Densen B. Cao, Dean Probst, Donald J. Roy
  • Patent number: D521858
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: May 30, 2006
    Inventor: Donald J. Roy