Patents by Inventor Donald K. Newell
Donald K. Newell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9626586Abstract: Methods and systems of recognizing images may include an apparatus having a hardware module with logic to, for a plurality of vectors in an image, determine a first intermediate computation based on even pixels of an image vector, and determine a second intermediate computation based on odd pixels of an image vector. The logic can also combine the first and second intermediate computations into a Hessian matrix computation.Type: GrantFiled: June 30, 2014Date of Patent: April 18, 2017Assignee: Intel CorporationInventors: Yong Zhang, Ravishankar Iyer, Rameshkumar G. Illikkal, Donald K. Newell, Jianping Zhou
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Publication number: 20140314323Abstract: Methods and systems of recognizing images may include an apparatus having a hardware module with logic to, for a plurality of vectors in an image, determine a first intermediate computation based on even pixels of an image vector, and determine a second intermediate computation based on odd pixels of an image vector. The logic can also combine the first and second intermediate computations into a Hessian matrix computation.Type: ApplicationFiled: June 30, 2014Publication date: October 23, 2014Inventors: Yong Zhang, Ravishankar Iyer, Rameshkumar G. Illikkal, Donald K. Newell, Jianping Zhou
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Patent number: 8781234Abstract: Methods and systems of recognizing images may include an apparatus having a hardware module with logic to, for a plurality of vectors in an image, determine a first intermediate computation based on even pixels of an image vector, and determine a second intermediate computation based on odd pixels of an image vector. The logic can also combine the first and second intermediate computations into a Hessian matrix computation.Type: GrantFiled: October 1, 2010Date of Patent: July 15, 2014Assignee: Intel CorporationInventors: Yong Zhang, Ravishankar Iyer, Rameshkumar G. Illikkal, Donald K. Newell, Jianping Zhou
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Patent number: 8661460Abstract: A system for controlling use of broadcast content is described. In accordance with a particular implementation, the system includes a receiver in communication with a source of broadcast content. The receiver also includes, or is coupled to, a playback device. The receiver is configured to control the use of received broadcast content through the playback device in accordance with control information embedded in the broadcast content.Type: GrantFiled: September 11, 2012Date of Patent: February 25, 2014Assignee: Intel CorporationInventors: Donald K. Newell, David W. Doerner, Rajiv Choudhary
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Patent number: 8621149Abstract: In one embodiment, a cache memory includes entries each to store a ring level identifier, which may indicate a privilege level of information stored in the entry. This identifier may be used in performing read accesses to the cache memory. As an example, a logic coupled to the cache memory may filter an access to one or more ways of a selected set of the cache memory based at least in part on a current privilege level of a processor and the ring level identifier of the one or more ways. Other embodiments are described and claimed.Type: GrantFiled: December 23, 2009Date of Patent: December 31, 2013Assignee: Intel CorporationInventors: Zhen Fang, Li Zhao, Ravishankar Iyer, Tong Li, Donald K. Newell
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Patent number: 8458711Abstract: A method, computer readable medium, and system are disclosed. In one embodiment, the method comprises setting a quality of service (QoS) priority level value for one or more computer system platform resources, other than a central processor core, relating to a task running on the computer system, and determining whether the one or more computer system platform resources will be allocated to the task based on the QoS priority level setting.Type: GrantFiled: September 25, 2006Date of Patent: June 4, 2013Assignee: Intel CorporationInventors: Ramesh G. Illikkal, Ravishankar R. Iyer, Leena K. Puthiyedath, Donald K. Newell, Li Zhao, Srihari Makineni
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Patent number: 8392657Abstract: An apparatus, method, and system are disclosed. In one embodiment the apparatus includes a cache memory, which a number of sets. Each of the sets in the cache memory have several cache lines. The apparatus also includes at least one process resource table. The process resource table maintains a cache line occupancy count of a number of cache lines. Specifically, the cache line occupancy count for each cache line describes the number of cache lines in the cache storing information utilized by a process running on a computer system. Additionally, the process resource table stores the occupancy count of less cache lines than the total number of cache lines in the cache memory.Type: GrantFiled: October 9, 2009Date of Patent: March 5, 2013Assignee: Intel CorporationInventors: Li Zhao, Ravishankar Iyer, Rameshkumar G. Illikkal, Erik G. Hallnor, Martin G. Dixon, Donald K. Newell
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Publication number: 20130007783Abstract: A system for controlling use of broadcast content is described. In accordance with a particular implementation, the system includes a receiver in communication with a source of broadcast content. The receiver also includes, or is coupled to, a playback device. The receiver is configured to control the use of received broadcast content through the playback device in accordance with control information embedded in the broadcast content.Type: ApplicationFiled: September 11, 2012Publication date: January 3, 2013Applicant: INTEL CORPORATIONInventors: Donald K. Newell, David W. Doerner, Rajiv Choudhary
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Patent number: 8291444Abstract: A system for controlling use of broadcast content is described. In accordance with a particular implementation, the system includes a receiver in communication with a source of broadcast content. The receiver also includes, or is coupled to, a playback device. The receiver is configured to control the use of received broadcast content through the playback device in accordance with control information embedded in the broadcast content.Type: GrantFiled: December 30, 1999Date of Patent: October 16, 2012Assignee: Intel CorporationInventors: Donald K. Newell, David W. Doerner, Rajiv Choudhary
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Publication number: 20120082387Abstract: Methods and systems of recognizing images may include an apparatus having a hardware module with logic to, for a plurality of vectors in an image, determine a first intermediate computation based on even pixels of an image vector, and determine a second intermediate computation based on odd pixels of an image vector. The logic can also combine the first and second intermediate computations into a Hessian matrix computation.Type: ApplicationFiled: October 1, 2010Publication date: April 5, 2012Inventors: Yong Zhang, Ravishankar Iyer, Rameshkumar G. Illikkal, Donald K. Newell, Jianping Zhou
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Publication number: 20110153926Abstract: In one embodiment, a cache memory includes entries each to store a ring level identifier, which may indicate a privilege level of information stored in the entry. This identifier may be used in performing read accesses to the cache memory. As an example, a logic coupled to the cache memory may filter an access to one or more ways of a selected set of the cache memory based at least in part on a current privilege level of a processor and the ring level identifier of the one or more ways. Other embodiments are described and claimed.Type: ApplicationFiled: December 23, 2009Publication date: June 23, 2011Inventors: Zhen Fang, Li Zhao, Ravishankar Iyer, Tong Li, Donald K. Newell
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Publication number: 20110113200Abstract: Embodiments of an apparatus for controlling cache occupancy rates are presented. In one embodiment, an apparatus comprises a controller and monitor logic. The monitor logic determines a monitored occupancy rate associated with a first program class. The first controller regulates a first allocation probability corresponding to the first program class, based at least on the difference between a requested occupancy rate and the first monitored occupancy rate.Type: ApplicationFiled: November 10, 2009Publication date: May 12, 2011Inventors: Jaideep Moses, Rameshkumar G. Illikkal, Donald K. Newell, Ravishankar Iyer, Kostantinos Alsopos, Li Zhao
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Publication number: 20110087843Abstract: An apparatus, method, and system are disclosed. In one embodiment the apparatus includes a cache memory, which a number of sets. Each of the sets in the cache memory have several cache lines. The apparatus also includes at least one process resource table. The process resource table maintains a cache line occupancy count of a number of cache lines. Specifically, the cache line occupancy count for each cache line describes the number of cache lines in the cache storing information utilized by a process running on a computer system. Additionally, the process resource table stores the occupancy count of less cache lines than the total number of cache lines in the cache memory.Type: ApplicationFiled: October 9, 2009Publication date: April 14, 2011Inventors: Li Zhao, Ravishankar Iyer, Rameshkumar G. Illikkal, Erik G. Hallnor, Martin G. Dixon, Donald K. Newell
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Patent number: 7490191Abstract: Embodiments of apparatuses, methods, and systems for sharing information between guests in a virtual machine environment are disclosed. In one embodiment, an apparatus includes virtual machine control logic, an execution unit, and a memory management unit. The virtual machine control logic is to transfer control of the apparatus among a host and its guests. The execution unit is to execute an instruction to copy information from a virtual memory address in one guest's virtual address space to a virtual memory address in another guest's virtual address space. The memory management unit is to translate the virtual memory addresses to physical memory addresses.Type: GrantFiled: September 22, 2006Date of Patent: February 10, 2009Assignee: Intel CorporationInventors: Rameshkumar G. Illikkal, Donald K. Newell, Ravishankar Iyer, Srihari Makineni
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Publication number: 20080244221Abstract: Embodiments of apparatuses, methods, and systems for exposing system topology to an execution environment are disclosed. In one embodiment, an apparatus includes execution cores and resources on a single integrated circuit, and topology logic. The topology logic is to populate a data structure with information regarding a relationship between the execution cores and the resources.Type: ApplicationFiled: March 30, 2007Publication date: October 2, 2008Inventors: Donald K. Newell, Jaideep Moses, Ravishankar Iyer, Rameshkumar G. Illikkal, Srihari Makineni
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Publication number: 20080075101Abstract: A method, computer readable medium, and system are disclosed. In one embodiment, the method comprises setting a quality of service (QoS) priority level value for one or more computer system platform resources, other than a central processor core, relating to a task running on the computer system, and determining whether the one or more computer system platform resources will be allocated to the task based on the QoS priority level setting.Type: ApplicationFiled: September 25, 2006Publication date: March 27, 2008Inventors: Ramesh G. Illikkal, Ravishankar R. Iyer, Leena K. Puthiyedath, Donald K. Newell, Li Zhao, Srihari Makineni
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Publication number: 20080077765Abstract: Embodiments of apparatuses, methods, and systems for sharing information between guests in a virtual machine environment are disclosed. In one embodiment, an apparatus includes virtual machine control logic, an execution unit, and a memory management unit. The virtual machine control logic is to transfer control of the apparatus among a host and its guests. The execution unit is to execute an instruction to copy information from a virtual memory address in one guest's virtual address space to a virtual memory address in another guest's virtual address space. The memory management unit is to translate the virtual memory addresses to physical memory addresses.Type: ApplicationFiled: September 22, 2006Publication date: March 27, 2008Inventors: Rameshkumar G. Illikkal, Donald K. Newell, Ravishankar Iyer, Srihari Makineni
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Patent number: 6205140Abstract: A method for communicating between a sender and a receiver a set of dependencies among a set of media streams in a data network. The method comprises the step of creating a payload data packet having a header and a set of stream descriptors, where the header has a required stream field. Each stream descriptor is uniquely associated with a media stream belonging to the set of media streams and has a connection field to provide a network address for its associated media stream. Each stream descriptor that is associated with a media stream having a dependency also has a dependency field. The method also comprises the steps of creating a control data packet having the payload data packet as a payload; setting the required stream field to a value indicative of a required set of media streams, the required set of media streams being a subset of the set of media streams; and setting the dependency fields to indicate the set of relationships.Type: GrantFiled: December 1, 1997Date of Patent: March 20, 2001Assignee: Intel CorporationInventors: David M. Putzolu, Donald K. Newell