Abstract: Embodiments of the invention provide a method, distributed antenna system, and components that generate a jitter reduced clock signal from a serial encoded binary data stream transmitted over a communication medium. The method comprises receiving a modulated signal that includes the encoded binary data stream and extracting the encoded binary data stream. The method further comprises generating a recovered clock signal that is phase locked to the encoded binary data stream, generating an error signal based on a difference between a phase of the encoded binary data stream and the recovered clock signal, and integrating the error signal to generate a signal to control a voltage controlled oscillator. The method further comprises generating a stable recovered clock signal and producing at least one output clock by scaling the stable recovered clock signal frequency.

Abstract: A distributed antenna system is provided for communicating with a plurality of base stations. The distributed antenna system includes a system controller and a master unit communicating with at least one of the plurality of base stations. A remote unit communicates over a high data rate media with the master unit and/or a downstream remote unit. Alternatively, the distributed antenna system includes a controller and a digital time/space crosspoint switch controlled by the controller. A digitizing transceiver is in communication with the digital time/space crosspoint switch. The crosspoint switch is configured to transmit and receive digital data through the digitizing transceiver.

Abstract: Embodiments of the invention provide a method, distributed antenna system, and components that generate a jitter reduced clock signal from a serial encoded binary data stream transmitted over a communication medium. The method comprises receiving a modulated signal that includes the encoded binary data stream and extracting the encoded binary data stream. The method further comprises generating a recovered clock signal that is phase locked to the encoded binary data stream, generating an error signal based on a difference between a phase of the encoded binary data stream and the recovered clock signal, and integrating the error signal to generate a signal to control a voltage controlled oscillator. The method further comprises generating a stable recovered clock signal and producing at least one output clock by scaling the stable recovered clock signal frequency.