Patents by Inventor Donald Preslar

Donald Preslar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050168249
    Abstract: An over-voltage protection circuit prevents an anomaly, such as a short circuit in the upper-switched electronic device of a DC-DC power supply, from propagating to downstream circuitry. The over-voltage protection circuit, which includes an overvoltage sense resistor coupled between an output of the upper or high side FET and the gate of the lower FET, is operative to sense a short circuit fault condition in the circuit path through the upper FET during initial power up of the system. In response to this condition, the lower NFET device is turned on so as to provide an immediate by-pass of the overvoltage condition to ground, and thereby prevent excessive voltage from being applied by the output terminal to downstream powered circuitry.
    Type: Application
    Filed: March 28, 2005
    Publication date: August 4, 2005
    Inventors: Noel Dequina, Donald Preslar, Paul Sferrazza
  • Publication number: 20050128776
    Abstract: A body diode comparator circuit for a synchronous rectified FET driver including a sample circuit and a comparator. The FET driver has a phase node coupled between a pair of upper and lower switching FETs and is responsive to a PWM signal having first and second phases for each cycle. The sample circuit samples an initial voltage of the phase node during the first phase of the PWM signal and provides a sum voltage indicative of the initial phase voltage added to the voltage level of the phase node during the second phase of the PWM signal. The comparator compares the sum voltage with a predetermined reference voltage and provides an output indicative of an activation state of the lower FET during the second phase of the PWM signal. The FET driver turns on the upper FET when the comparator indicates that the lower FET is off.
    Type: Application
    Filed: March 10, 2004
    Publication date: June 16, 2005
    Applicant: Intersil Americas Inc.
    Inventors: Noel Dequina, Donald Preslar, Paul Sferrazza
  • Patent number: 6727745
    Abstract: The integrated circuit includes a power driving device, and a pilot device for sensing current through the power driving device. The pilot device includes a composite pilot having a plurality of series connected transistors and which is at least active while the power driving device is in a linear mode, and a secondary pilot which is active while the power driving device is in a saturation mode. Also, a control circuit activates the secondary pilot.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: April 27, 2004
    Assignee: Intersil Americas Inc.
    Inventors: William Shearon, Salomon Vulih, Donald Preslar
  • Patent number: 6603358
    Abstract: The integrated circuit includes a power FET for generating an output voltage, a pilot FET for sensing current through the power driving device and generating a reference voltage, and an amplifier circuit for comparing the reference voltage of the pilot device with the output voltage of the power driving device. The amplifier circuit includes a differential pair of matched bipolar junction transistors (BJTs) having a common base. A first BJT of the differential pair being diode-connected. The amplifier circuit controls the gates of the power FET and the pilot FET.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: August 5, 2003
    Assignee: Intersil Americas Inc.
    Inventors: William Shearon, Salomon Vulih, Donald Preslar
  • Patent number: 6531908
    Abstract: A power output stage for switching inductive loads contains a series circuit having a load and a switching transistor. A series connected circuit formed of a blocking diode and a multiplicity of Zener diodes is disposed between the drain and gate electrodes of the switching transistor. A capacitor, a resistor or a series or parallel circuit of a capacitor and a resistor is disposed in parallel with at least one of the Zener diodes. The circuit configuration rounds off the pronounced kink in the drain voltage when the Zener protection cuts in during a switched state of the switching transistor.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: March 11, 2003
    Assignee: Siemens Aktiengesellschaft
    Inventors: Gerhard Goeser, Mark Elliott, Donald Preslar
  • Publication number: 20020024386
    Abstract: The integrated circuit includes a power FET for generating an output voltage, a pilot FET for sensing current through the power driving device and generating a reference voltage, and an amplifier circuit for comparing the reference voltage of the pilot device with the output voltage of the power driving device. The amplifier circuit includes a differential pair of matched bipolar junction transistors (BJTs) having a common base. A first BJT of the differential pair being diode-connected. The amplifier circuit controls the gates of the power FET and the pilot FET.
    Type: Application
    Filed: August 13, 2001
    Publication date: February 28, 2002
    Applicant: Intersil Americas Inc.
    Inventors: William Shearon, Salomon Vulih, Donald Preslar
  • Publication number: 20020024786
    Abstract: The integrated circuit includes a power driving device, and a pilot device for sensing current through the power driving device. The pilot device includes a composite pilot having a plurality of series connected transistors and which is at least active while the power driving device is in a linear mode, and a secondary pilot which is active while the power driving device is in a saturation mode. Also, a control circuit activates the secondary pilot.
    Type: Application
    Filed: August 13, 2001
    Publication date: February 28, 2002
    Applicant: Intersil Americas, Inc.
    Inventors: William Shearon, Salomon Vulih, Donald Preslar
  • Patent number: 5570259
    Abstract: A circuit arrangement for controlling a load and for recognizing an interruption in a line to the load includes a measuring resistance connected in series with the load, a device for varying a resistance value of the measuring resistance as a function of a current passing through the load, and a diagnostic device for generating a diagnosis signal if a voltage drop, producible across the measuring resistance by a load current drops below a threshold value.
    Type: Grant
    Filed: August 9, 1993
    Date of Patent: October 29, 1996
    Assignees: Siemens Aktiengesellschaft, Harris Semiconductor GmbH
    Inventors: Franz Allmeier, Theodor Maier, Gerhard Goeser, Donald Preslar, Philip Murphy