Patents by Inventor Donald R. Banks

Donald R. Banks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Crack resistant interconnect module
    Publication number: 20040104463
    Abstract: A laminated flip-chip interconnect package comprising a substrate having a chip attach surface and a board attach surface that define contact pads for attachment to corresponding pads on the chip and board wherein the substrate board surface comprises at least one solid plane covering the chip attach surface region near at least one chip corner. In one embodiment, the solid plane comprises a dielectric material, optionally covered with a soldermask or coverlay material. In an alternate embodiment, the solid plane comprises a metal, optionally covered with a soldermask or coverlay material.
    Type: Application
    Filed: September 23, 2003
    Publication date: June 3, 2004
    Inventors: Robin E. Gorrell, Mark F. Sylvester, Donald R. Banks, Michael D. Holcomb, William V. Ballard, Kouichi Hirosawa, Sadanobu Satou, Teruhiko Kimura
  • Method for assembling an integrated circuit chip package having an underfill material between a chip and a substrate
    Patent number: 6015722
    Abstract: The present invention generally relates to the field of integrated circuit chip packaging. More particularly, the present invention relates to methods of manufacturing integrated circuit chip packages, and methods for electrically connecting and bonding or attaching semiconductor devices to an integrated circuit chip.
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: January 18, 2000
    Assignee: Gore Enterprise Holdings, Inc.
    Inventors: Donald R. Banks, Ronald G. Pofahl, Mark F. Sylvester, William G. Petefish, Paul J. Fischer
  • Method for assembling an integrated circuit chip package having at least one semiconductor device
    Patent number: 5970319
    Abstract: The present invention generally relates to the field of integrated circuit chip packaging. More particularly, the present invention relates to methods of manufacturing integrated circuit chip packages, and methods for electrically connecting and bonding or attaching semiconductor devices to an integrated circuit chip.
    Type: Grant
    Filed: February 19, 1999
    Date of Patent: October 19, 1999
    Assignee: Gore Enterprise Holdings, Inc.
    Inventors: Donald R. Banks, Ronald G. Pofahl, Mark F. Sylvester, William G. Petefish, Paul J. Fischer
  • Method for assembling an integrated circuit chip package having at least one semiconductor device
    Patent number: 5919329
    Abstract: The present invention generally relates to the field of integrated circuit chip packaging. More particularly, the present invention relates to methods of manufacturing integrated circuit chip packages, and methods for electrically connecting and bonding or attaching semiconductor devices to an integrated circuit chip.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: July 6, 1999
    Assignee: Gore Enterprise Holdings, Inc.
    Inventors: Donald R. Banks, Ronald G. Pofahl, Mark F. Sylvester, William G. Petefish, Paul J. Fischer
  • Metallurgical interconnect composite
    Patent number: 5910354
    Abstract: A metallurgical interconnect composite is provided defined by a compliant, metallurgical, open cell, porous substrate which has a plurality of Z-axis conductive pathways extending from one side of the substrate to the other side. Each conductive pathway terminates in a solder covered surface area.
    Type: Grant
    Filed: March 4, 1997
    Date of Patent: June 8, 1999
    Assignee: W.L. Gore & Associates, Inc.
    Inventors: Carmine G. Meola, Daniel D. Johnson, Donald R. Banks, Joseph G. Ameen
  • Solder ball interconnected assembly
    Patent number: 5591941
    Abstract: High melting temperature Pb/Sn 95/5 solder balls are connected to copper pads on the bottom of a ceramic chip carrier substrate by low melting temperature eutectic Pb/Sn solder. The connection is made by quick reflow to prevent dissolving Pb into the eutectic solder and raising its melting temperature. Then the module is placed on a fiberglass-epoxy circuit board with the solder balls on eutectic Pb/Sn solder bumps on copper pads of the board. The structure is reflowed to simultaneously melt the solder on both sides of the balls to allow each ball to center between the carrier pad and circuit board pad to form a more symmetric joint. This process results in structure that are more reliable under high temperature cycling.
    Type: Grant
    Filed: October 28, 1993
    Date of Patent: January 7, 1997
    Assignee: International Business Machines Corporation
    Inventors: John Acocella, Donald R. Banks, Joseph A. Benenati, Thomas Caulfield, Karl G. Hoebener, David P. Watson, John S. Corbin, Jr.