Patents by Inventor Donald R. Schropp

Donald R. Schropp has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070238209
    Abstract: The present invention is directed to methods and systems of modulating step function phenomena by varying nanoparticle size—particularly wherein a plurality of such nanoparticles are employed, and wherein said nanoparticles comprise a size distribution favorable for collectively smoothing the step function. Such methods and systems are particularly favorable for hydrogen sensors.
    Type: Application
    Filed: April 4, 2007
    Publication date: October 11, 2007
    Applicant: NANO-PROPRIETARY, INC.
    Inventors: Zvi Yaniv, Donald R. Schropp
  • Patent number: 7090554
    Abstract: A flat-panel display is fabricated by a process in which a spacer (24) having a rough face (54 or 56) is positioned between a pair of plate structure (20 and 22). When electrons strike the spacer, the roughness in the spacer's face causes the number of secondary electrons that escape the spacer to be reduced, thereby alleviating positive charge buildup on the spacer. As a result, the image produced by the display is improved. The spacer facial roughness can be achieved in various ways such as providing suitable depressions (60, 62, 64, 66, 70, 74, or 80) or/and protuberances (82, 84, 88, and 92) along the spacer's face.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: August 15, 2006
    Assignees: Candescent Technologies Corporation, Candescent Intellectual Property Services, Inc., Advanced Technology Materials, Inc.
    Inventors: Roger W. Barton, Kollengode S. Narayanan, Bob L. Mackey, John M. Macaulay, George B. Hopple, Donald R. Schropp, Jr., Michael J. Nystrom, Sudhakar Gopalakrishnan, Shiyou Pei, Xueping Xu
  • Patent number: 6861798
    Abstract: The present invention provides a spacer assembly which is tailored to provide a secondary electron emission coefficient of approximately 1 for the spacer assembly when the spacer assembly is subjected to flat panel display operating voltages. The present invention further provides a spacer assembly which accomplishes the above achievement and which does not degrade severely when subjected to electron bombardment. The present invention further provides a spacer assembly which accomplishes both of the above-listed achievements and which does not significantly contribute to contamination of the vacuum environment of the flat panel display or be susceptible to contamination that may evolve within the tube. Specifically, in one embodiment, the present invention is comprised of a spacer structure which has a specific secondary electron emission coefficient function associated therewith.
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: March 1, 2005
    Assignees: Candescent Technologies Corporation, Candescent Intellectual Property Services, Inc.
    Inventors: Lawrence S. Pan, Donald R. Schropp, Jr., Vasil M. Chakarov, John K. O'Reilly, George B. Hopple, Christopher J. Spindt, Roger W. Barton, Michael J. Nystrom, Ramamoorthy Ramesh, James C. Dunphy, Shiyou Pei, Kollengode S. Narayanan
  • Patent number: 6617772
    Abstract: A flat-panel display contains a pair of plate structure (20 and 22) separated by a spacer (24) having a rough face (54 or 56). When electrons strike the spacer, the roughness in the spacer's face causes the number of secondary electrons that escape the spacer to be reduced, thereby alleviating positive charge buildup on the spacer. As a result, the image produced by the display is improved. The spacer facial roughness can be achieved in various ways such as depressions (60, 62, 64, 66, 70, 74, or 80) or/and protuberances (82, 84, 88, and 92). Various techniques are presented for manufacturing the display, including the rough-faced spacer.
    Type: Grant
    Filed: December 11, 1998
    Date of Patent: September 9, 2003
    Assignees: Candescent Technologies Corporation, Candescent Intellectual Property Services, Inc., Advanced Technology Materials, Inc
    Inventors: Roger W. Barton, Kollengode S. Narayanan, Bob L. Mackey, John M. Macaulay, George B. Hopple, Donald R. Schropp, Jr., Michael J. Nystrom, Sudhakar Gopalakrishnan, Shiyou Pei, Xueping Xu
  • Patent number: 6414428
    Abstract: The intensity at which electrons emitted by a first plate structure (10) in a flat-panel display strike a second plate structure (12) for causing it to emit light is controlled so as to reduce image degradation that could otherwise arise from undesired electron-trajectory changes caused by effects such as the presence of a spacer system (14) between the plate structures. An electron-emissive region (20) in the first plate structure typically contains multiple laterally separated electron-emissive portions (201 and 202) for selectively emitting electrons. An electron-focusing system in the first plate structure has corresponding focus openings (42P1 and 42P2) through which electrons emitted by the electron-emissive portions respectively pass. Upon being struck by the so-emitted electrons, a light-emissive region (22) in the second plate structure emits light to produce at least part of a dot of the display's image.
    Type: Grant
    Filed: April 30, 1999
    Date of Patent: July 2, 2002
    Assignees: Candescent Technologies Corporation, Candescent Intellectual Property Services, Inc.
    Inventors: Donald R. Schropp, Jr., John E. Field, James C. Dunphy, Lawrence S. Pan, David L. Morris, Ronald S. Besser, Christopher J. Spindt
  • Patent number: 6236157
    Abstract: In a field emission display device, a spacer assembly and a method for forming a spacer assembly. In one embodiment, the present invention is comprised of a spacer wall which has a specific secondary electron emission coefficient function associated therewith. In the present embodiment, a coating material is then applied to at least a portion of the spacer wall. In this embodiment, the coating material has a secondary electron emission coefficient function which is different than the secondary electron emission coefficient function of the spacer wall. In so doing, the present embodiment provides a spacer assembly having a plurality of secondary electron emission coefficient functions associated therewith.
    Type: Grant
    Filed: February 26, 1999
    Date of Patent: May 22, 2001
    Assignee: Candescent Technologies Corporation
    Inventors: Lawrence S. Pan, Donald R. Schropp, Jr.
  • Patent number: 6153986
    Abstract: A voltage ratio regulator circuit for a spacer electrode of a flat panel display screen. Within one implementation of a field emission display (FED) device, thin spacer walls are inserted between a high voltage (Vh) faceplate and a backplate to secure these structures as a vacuum is formed between. A phosphor layer on the faceplate receives electrons selectively emitted from discrete electron emitting areas along the backplate (cathode) thereby forming images on the faceplate. The faceplate warms relative to the backplate, as a result of energy released by the phosphor layer, thereby generating a temperature gradient along the spacer walls. The top portion of each spacer wall becomes more conductive with increased temperature and acts to attract electrons that are emitted toward the faceplate. To counter this attraction, a spacer electrode is placed along each spacer wall at a height, d, above the backplate and maintained at a voltage, Ve. Electrodes of all of the spacer walls are coupled together.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: November 28, 2000
    Assignee: Candescent Technologies Corporation
    Inventors: James C. Dunphy, Donald R. Schropp, Jr.
  • Patent number: 6051937
    Abstract: A voltage ratio regulator circuit for a spacer electrode of a flat panel display screen. Within one implementation of a field emission display (FED) device, thin spacer walls are inserted between a high voltage (Vh) faceplate and a backplate to secure these structures as a vacuum is formed between. A phosphor layer on the faceplate receives electrons selectively emitted from discrete electron emitting areas along the backplate (cathode) thereby forming images on the faceplate. The faceplate warms relative to the backplate, as a result of energy released by the phosphor layer, thereby generating a temperature gradient along the spacer walls. The top portion of each spacer wall becomes more conductive with increased temperature and acts to attract electrons that are emitted toward the faceplate. To counter this attraction, a spacer electrode is placed along each spacer wall at a height, d, above the backplate and maintained at a voltage, Ve. Electrodes of all of the spacer walls are coupled together.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: April 18, 2000
    Assignee: Candescent Technologies Corporation
    Inventors: James C. Dunphy, Donald R. Schropp, Jr.