Abstract: Method and apparatus for generating a jitter reduced clock signal from signal transmitted over a communication medium includes receiving, with high speed data interface circuitry, a modulated signal that includes a binary encoded data stream. A recovered clock signal is generated from the modulated signal and tracks the long-term drift in the modulated signal. A jitter reduced clock signal is generated by filtering the recovered clock signal with a filtering circuit having a bandwidth sufficient to remove jitter while allowing the jitter reduced clock signal to track the drift in the modulated signal.

Abstract: Method and apparatus for generating a jitter reduced clock signal from signal transmitted over a communication medium includes receiving, with high speed data interface circuitry, a modulated signal that includes a binary encoded data stream. A recovered clock signal is generated from the modulated signal and tracks the long-term drift in the modulated signal. A jitter reduced clock signal is generated by filtering the recovered clock signal with a filtering circuit having a bandwidth sufficient to remove jitter while allowing the jitter reduced clock signal to track the drift in the modulated signal.

Abstract: Embodiments of the invention provide a method, distributed antenna system, and components that generate a jitter reduced clock signal from a binary encoded data stream transmitted over a communication medium. The method includes receiving a modulated signal that includes the binary encoded data stream and generating a recovered clock signal that is phase locked to the binary encoded data stream. The method further comprises generating a stable recovered clock signal by filtering the recovered clock signal to remove jitter, while allowing the clock signal to track long-term drift.

Abstract: A system is provided for adjusting power provided to a device. The system can include power sourcing equipment and a sub-system. The power sourcing equipment can provide power to a powered device via a channel. The sub-system can determine an amount by which to increase the power based on a resistance of the channel. The power sourcing equipment or the powered device can adjust the power (or load) responsive to a command from the sub-system. The sub-system can include a measurement device and a processor. The measurement device can measure an output voltage of the power sourcing equipment, an input voltage of the powered device, and a current on the channel. The processor can determine the resistance of the channel based on the output voltage, the input voltage, and the current. The processor can output a command specifying an increase or decrease in power supplied by the power sourcing equipment.

Abstract: Embodiments of the invention provide a method, distributed antenna system, and components that generate a jitter reduced clock signal from a binary encoded data stream transmitted over a communication medium. The method includes receiving a modulated signal that includes the binary encoded data stream and generating a recovered clock signal that is phase locked to the binary encoded data stream. The method further comprises generating a stable recovered clock signal by filtering the recovered clock signal to remove jitter, while allowing the clock signal to track long-term drift.

Abstract: A system is provided for adjusting power provided to a device. The system can include power sourcing equipment and a sub-system. The power sourcing equipment can provide power to a powered device via a channel. The sub-system can determine an amount by which to increase the power based on a resistance of the channel. The power sourcing equipment or the powered device can adjust the power (or load) responsive to a command from the sub-system. The sub-system can include a measurement device and a processor. The measurement device can measure an output voltage of the power sourcing equipment, an input voltage of the powered device, and a current on the channel. The processor can determine the resistance of the channel based on the output voltage, the input voltage, and the current. The processor can output a command specifying an increase or decrease in power supplied by the power sourcing equipment.