Abstract: First and second successions of data words, each data word including multiple payload data bits, a data block bit (C) and a block character (SOB) having a first state to indicate start of a sequence of data block bits and otherwise having a second state, are processed by detecting as a first event occurrence of the block character of the first succession of data words in the first state and as a second event the next succeeding occurrence of the block character of the second succession of data words in the first state, wherein the second event is delayed by a time Tz relative to the first event, reading the data block bits from successive data words of the first succession and generating a succession of delayed data block bits of the first succession of data words, delayed by the time Tz relative to the payload data bits of the first succession of data words.

Abstract: Audio data of at least two audio data groups is embedded in an ancillary data space of a serial digital video data stream by multiplexing the audio data groups to provide a serial multi-group audio data stream, and inserting the serial multi-group audio data stream into the ancillary data space of the serial digital video data stream.

Abstract: A routing switch includes a first router module having N1 signal input terminals, M1 signal output terminals, an expansion input terminal and an expansion output terminal and including a core for routing a signal received at any one of the N1 signal input terminals selectively to any one or more of the output terminals and for routing a signal received at the expansion input terminal selectively to any one or more of the N1 signal output terminals. The router further includes a second router module having N2 signal input terminals, M2 signal output terminals, an expansion input terminal and an expansion output terminal and including a core for routing a signal received at any one of the N2 signal input terminals selectively to any one or more of the output terminals and for routing a signal received at the expansion input terminal selectively to any one or more of the M2 signal output terminals.

Abstract: A router that utilizes one additional crosspoint module to provide backup to N crosspoint modules. The redundant crosspoint module receives every input from P input modules and provides O/N outputs to M output modules. Each of the M output modules receives an output from a particular N crosspoint module and a corresponding O/M output from the redundant crosspoint module. Each output module has logic to determine whether the output module should select the output from a particular N crosspoint module or the output of the redundant crosspoint module.

Abstract: A router that utilizes one additional crosspoint module to provide backup to N crosspoint modules. The redundant crosspoint module receives every input from P input modules and provides O/N outputs to M output modules. Each of the M output modules receives an output from a particular N crosspoint module and a corresponding O/M output from the redundant crosspoint module. Each output module has logic to determine whether the output module should select the output from a particular N crosspoint module or the output of the redundant crosspoint module.

Abstract: An electrical signal is equalized at the receiving end of a transmission path by applying the signal both to a frequency-dependent emphasizer and to a first port of a mixer and applying the output signal of the frequency-dependent emphasizer to a second port of the mixer. The mixer combines the signals received at its first and second ports in accordance with the amplitude of a mixer control signal to generate a mixer output signal. A control signal is generated from the mixer output signal. The control signal has an amplitude dependent on the absolute value of the derivative of the amplitude of the output signal of the mixer during an interval that starts after the beginning of a bit cell and ends before the end of the bit cell. The control signal is applied to the mixer as the mixer control signal.

Abstract: Phase of first and second signals is compared by producing an output signal in the event of a predetermined phase relationship between the first and second signals and clearing the output signal at a predetermined phase during the cycle of the second signal regardless of the state of the first signal.