Abstract: A high speed digital equalizer provides a means for replacing the conventional transversal filter used to preset equalize a channel with simple digital circuits prior to data transmission. In particular, the analog to digital converter and digital multipliers of a transversal filter are replaced with a digital to analog converter and random access memory, respectively, which permits equalizers to be used with band limited channels operating at much higher data rates than previously possible because of sample rate limitations.

Abstract: A method is shown for testing ultra high speed digital arithmetic circuits r even complete digital signal processors which operate at speeds faster than presently available test equipment. With this technique for testing, the operating speed of digital circuits can be increased until failures occur and then quantitative information on failure rates can be measured.

Abstract: A programmable signal processor is disclosed for use with an array radar. e programmable signal processor has quadrature channel, moving target indicators followed by post detection integration. The moving target indicators can be programmed to have any desired frequency response and can be adapted as a function of antenna beam position, range bin sector, or time. The processor also contains a high speed buffer which provides the capability to record, in real time, unprocessed raw video as well as corresponding processed moving target indicators and integrator outputs. The signal processor simultaneously processes the in-phase and quadrature components of the input signal. The output processed video signal is a digital representation of the input signal with fixed or slow moving clutter reduced and the signal-to-noise ratio improved by the response of the moving target indicator filter and the integrator respectively.