Abstract: A sensor is disclosed herein. The sensor includes a fiber operable to communicate a light wave. The sensor also includes at least first and second Fiber Bragg Gratings disposed along the fiber. The sensor also includes a structure operable to be Deformed in a plane of deformation. The at least first and second Fiber Bragg Gratings are disposed on opposite sides of the structure in the plane of deformation. The sensor also includes an interrogation unit operable to receive first and second signals corresponding to first and second wavelengths from the at least first and second Fiber Bragg Gratings. The first signal is associated with the first Fiber Bragg Grating and the second signal is associated with the second Fiber Bragg Grating.

Abstract: A sensor is disclosed herein. The sensor includes a fiber operable to communicate a light wave. The sensor also includes at least first and second Fiber Bragg Gratings disposed along the fiber. The sensor also includes a structure operable to be deformed in a plane of deformation. The at least first and second Fiber Bragg Gratings are disposed on opposite sides of the structure in the plane of deformation. The sensor also includes an interrogation unit operable to receive first and second signals corresponding to first and second wavelengths from the at least first and second Fiber Bragg Gratings. The first signal is associated with the first Fiber Bragg Grating and the second signal is associated with the first Fiber Bragg Grating. The sensor also includes a processor operably to derive a difference between the wavelengths of the first and second signals and compare the difference with data correlating wavelength differences to extents of deformation of the structure to yield a current extent of deformation.

Abstract: In accordance with at least one embodiment, a method, apparatus, and article of manufacture are provided for configuring a virtual boundary register in a programmable logic device (PLD), transmitting a first user-definable-command operation code (opcode) to the PLD to effect programming of a memory device coupled to the PLD, and preferably transmitting a second user-definable-command opcode to the PLD, the second user-definable-command opcode causing the physical boundary scan circuitry to load the virtual boundary register. The foregoing is preferably achieved in accordance with a boundary scan standard (e.g., Institute of Electrical and Electronics Engineers, Inc. (IEEE) 1149.1, dated 2001).

Abstract: In accordance with at least one embodiment, a method, apparatus, and article of manufacture are provided for configuring a virtual boundary register in a programmable logic device (PLD), transmitting a first user-definable-command operation code (opcode) to the PLD to effect programming of a memory device coupled to the PLD, and preferably transmitting a second user-definable-command opcode to the PLD, the second user-definable-command opcode causing the physical boundary scan circuitry to load the virtual boundary register. The foregoing is preferably achieved in accordance with a boundary scan standard (e.g., Institute of Electrical and Electronics Engineers, Inc. (IEEE) 1149.1, dated 2001).