Abstract: A method for minimizing fabrication defects in ballast contact to a conductor in monolithically integrated semiconductor devices includes forming a sloping sidewall (318, 424) in both an insulating layer (106, 718) overlying a conductive layer (104, 714) by etching with a an RF biased fluorine based chemistry and an RF biased chlorine based chemistry, respectively, as defined by a single resist layer (108) having a sloped sidewall (212). A ballast layer (526, 726) is deposited on the structure (100, 700) and metal contacts (632, 634, 636, 638, 722) are disposed on the ballast layer (526, 722).

Abstract: A process for forming a catalyst layer for carbon nanotube growth comprising forming a catalyst layer having a first and second portion over one of a cathode metal layer or a ballast resistor layer; patterning a photoresist over the first portion; etching the second portion with a chlorine/argon plasma; removing the photoresist with an ash process; and removing the veils and preparing the surface for carbon nanotube growth with a semi-aqueous hydroxylamine solution.

Abstract: A process is provided for fabricating a via 52 between bonded wafers without undercutting an organic bonding material 32. The process for forming the via 52 in a structure including a dielectric material 14 and an organic bonding material 32, comprises forming a resist material 42 on the dielectric layer 14 and etching through the dielectric layer 14 and the organic bonding material 32 with 60CF4/20Ar/60CHF3/20N2. The resist may then be removed with an anisotropic high density oxygen plasma.

Abstract: In accordance with a specific embodiment, a method of processing a semiconductor substrate is disclosed whereby the substrate is thinned, and the dice formed on the substrate are singulated by a common process. Trench regions are formed on a backside of the substrate. An isotropic etch of the backside results in a thinning of the substrate while maintaining the depth of the trenches, thereby facilitating singulation of the die.