Abstract: A low voltage signaling differential signaling driver comprising a first output line coupled to a delay circuit, a first multiplexer and a first output buffer. The first output line is also coupled to an inverter, a second multiplexer and a second output buffer.

Abstract: A method for charge control of a photoflash capacitor. The method includes detecting a voltage on the photoflash capacitor, asserting and then latching a recharge signal when the detected voltage is lower than a first reference voltage, de-asserting and then latching the recharge signal when the detected voltage exceeds a second reference voltage, charging the photoflash capacitor when the recharge signal is asserted, and providing a pin for connection of a resistive element which determines the first reference voltage.

Abstract: A method for charge control of a photoflash capacitor. The method includes generating an input current to induce a charge current for the photoflash capacitor when an activation signal is asserted, detecting a first voltage from the photoflash capacitor and a second voltage corresponding to the input current, asserting and de-asserting a recharge signal respectively when the first detected voltage is lower and higher than a first reference voltage, asserting and de-asserting a current limit signal respectively when the second detected voltage is higher and lower than a second reference voltage, asserting the activation signal only when the recharge signal is asserted and the current limit signal is de-asserted, and providing a pin for connection of a resistive element which determines the second reference voltage.

Abstract: A combination PFC-PWM integrated circuit converter controller having a power factor correction stage and a pulse-width modulation stage. The power factor correction stage provides unity power factor and a regulated intermediate output voltage by sensing a current in the power factor correction circuit and by sensing the regulated intermediate output voltage in a voltage control loop. The regulated intermediate output voltage is sensed by an error amplifier that includes a current mirror. A dc supply voltage for powering the integrated circuit is generated that is representative of the regulated intermediate output voltage. The dc supply voltage is sensed for an overvoltage protection function. By sensing the intermediate regulated output voltage in the voltage control loop and by sensing the dc supply voltage for overvoltage protection, a component failure is less likely to affect both functions than if a single voltage was sensed for both functions.

Abstract: The present invention provides a circuit for supplying a verifying reference and measurement voltage for use in verifying the programming of a programmable cell. The present invention provides the verifying reference and measurement voltage through internal circuitry on the cell and eliminate any requirement for an externally provided reference voltage. The verifying voltage is provided by modifying the programming voltage. The programming voltage is stepped down or stepped up through the use of internal circuitry to provide the reference and measurement voltage.

Abstract: A CMOS circuit is disclosed for translating a signal from CML to CMOS logic voltage levels. The CMOS circuit includes two amplifier circuits coupled in parallel. The first amplifier circuit comprises of a programmable circuit and a CMOS inverter such that the CMOS inverter can be programmed "on" or "off" by the programmable circuit. The programmable circuit includes a programmable element which may be implemented using a fuse or floating gate technology. The second amplifying circuit comprises of a CMOS inverter. When the CMOS inverter in the first amplifier circuit is powered "on", the CMOS circuit is operating in a full power mode at high speed with both CMOS inverters operating. When the CMOS inverter in the first amplifier circuit is powered "off", the CMOS circuit is operating in a low power mode at a slower speed with only one CMOS inverter operating.