Abstract: The present invention relates to a composition for preventing or treating transplantation rejection or a transplantation rejection disease, comprising a novel compound and a calcineurin inhibitor. A co-administration of the present invention 1) reduces the activity of pathogenic Th1 cells or Th17 cells, 2) increases the activity of Treg cells, 3) has an inhibitory effect against side effects, such as tissue damage, occurring in the sole administration thereof, 4) inhibits various pathogenic pathways, 5) inhibits the cell death of inflammatory cells, and 6) increases the activity of mitochondria, in an in vivo or in vitro allogenic model, a transplantation rejection disease model, a skin transplantation model, and a liver-transplanted patient, and thus inhibits transplantation rejection along with mitigating side effects possibly occurring in the administration of a conventional immunosuppressant alone.

Abstract: A display device includes a display panel including a plurality of pixels which are connected to a plurality of gate lines and a plurality of data lines and display a plurality of consecutive frames of images, a data driver driving the data lines, a gate driver driving the gate lines, a clock generator outputting a gate clock signal, which drives the gate driver and swings between a gate-on voltage and a gate-off voltage, and a signal controller outputting a gate pulse signal which drives the clock generator and a data control signal which controls the data driver. The clock generator includes a voltage maintainer maintaining the gate clock signal at a reference voltage that has a fixed value between the gate-on voltage and the gate-off voltage for a predetermined time.

Abstract: A display device includes a display panel including a plurality of pixels which are connected to a plurality of gate lines and a plurality of data lines and display a plurality of consecutive frames of images, a data driver driving the data lines, a gate driver driving the gate lines, a clock generator outputting a gate clock signal, which drives the gate driver and swings between a gate-on voltage and a gate-off voltage, and a signal controller outputting a gate pulse signal which drives the clock generator and a data control signal which controls the data driver. The clock generator includes a voltage maintainer maintaining the gate clock signal at a reference voltage that has a fixed value between the gate-on voltage and the gate-off voltage for a predetermined time.

Abstract: A display device includes a substrate; and a red pixel electrode, a green pixel electrode, and a blue pixel electrode disposed on the substrate. Each of the red pixel electrode, the green pixel electrode, and the blue pixel electrode includes a transverse stem portion, a longitudinal stem portion, and a fine branch portion. An angle between the transverse stem portion and the fine branch portion of the red pixel electrode, an angle between the transverse stem portion and the fine branch portion of the green pixel electrode, and an angle between the transverse stem portion and the fine branch portion of the blue pixel electrode are different from each other.

Abstract: A display device includes a display panel including a plurality of pixels which are connected to a plurality of gate lines and a plurality of data lines and display a plurality of consecutive frames of images, a data driver driving the data lines, a gate driver driving the gate lines, a clock generator outputting a gate clock signal, which drives the gate driver and swings between a gate-on voltage and a gate-off voltage, and a signal controller outputting a gate pulse signal which drives the clock generator and a data control signal which controls the data driver. The clock generator includes a voltage maintainer maintaining the gate clock signal at a reference voltage that has a fixed value between the gate-on voltage and the gate-off voltage for a predetermined time.

Abstract: A display device includes a plurality of pixels arranged in a column direction and a row direction, a plurality of data lines and a data driving part configured to apply data signals to the data lines. The data lines are connected with one of the pixels of a k-th column (‘k’ is a natural number) and one of the pixels of a (k+1)-th column in an odd-numbered row. The data lines are connected with one of the pixels of a (k+1)-th column and one of the pixels of a (k+2)-th column in an even-numbered row. As a result, a pseudo dot inversion drive pattern may be implemented while driving the data lines in accordance with a columnar polarity inversion scheme.

Abstract: A display device includes: a timing controller to provide data including a pre-emphasis value and an image data value; a gamma reference voltage supplier to selectively supply one of a first gamma reference voltage and a second gamma reference voltage different from the first gamma reference voltage; and a data driver to supply a pre-emphasis voltage, that is generated based on the pre-emphasis value and the first gamma reference voltage, to data lines during a first period of a horizontal period, and to supply a data voltage, that is generated based on the image data value and the second gamma reference voltage, to the data lines during a second period of the horizontal period. The timing controller is to control the gamma reference voltage supplier to supply the first gamma reference voltage during the first period and to supply the second gamma reference voltage during the second period.

Abstract: A display device includes a substrate; and a red pixel electrode, a green pixel electrode, and a blue pixel electrode disposed on the substrate. Each of the red pixel electrode, the green pixel electrode, and the blue pixel electrode includes a transverse stem portion, a longitudinal stem portion, and a fine branch portion. An angle between the transverse stem portion and the fine branch portion of the red pixel electrode, an angle between the transverse stem portion and the fine branch portion of the green pixel electrode, and an angle between the transverse stem portion and the fine branch portion of the blue pixel electrode are different from each other.

Abstract: A liquid crystal display device includes m gate lines, n data lines, and m×n pixels each connected to a corresponding gate line, each connected to a corresponding data line, and each including a first sub-pixel and a second sub-pixel, wherein the first sub-pixel includes a first liquid crystal capacitor, and a first transistor configured to receive a data signal from the corresponding data line, and configured to apply the data signal to the first liquid crystal capacitor, and wherein the second sub-pixel includes a second liquid crystal capacitor, a second transistor configured to apply the data signal to the second liquid crystal capacitor, and a third transistor configured to apply a storage voltage, which is configured to swing between a first electric potential level and a second electric potential level that is greater than the first electric potential level, to the second liquid crystal capacitor.

Abstract: A display device includes a plurality of pixels arranged in a column direction and a row direction, a plurality of data lines and a data driving part configured to apply data signals to the data lines. The data lines are connected with one of the pixels of a k-th column (‘k’ is a natural number) and one of the pixels of a (k+1)-th column in an odd-numbered row. The data lines are connected with one of the pixels of a (k+1)-th column and one of the pixels of a (k+2)-th column in an even-numbered row. As a result, a pseudo dot inversion drive pattern may be implemented while driving the data lines in accordance with a columnar polarity inversion scheme.

Abstract: A display device includes a display panel including a plurality of pixels which are connected to a plurality of gate lines and a plurality of data lines and display a plurality of consecutive frames of images, a data driver driving the data lines, a gate driver driving the gate lines, a clock generator outputting a gate clock signal, which drives the gate driver and swings between a gate-on voltage and a gate-off voltage, and a signal controller outputting a gate pulse signal which drives the clock generator and a data control signal which controls the data driver. The clock generator includes a voltage maintainer maintaining the gate clock signal at a reference voltage that has a fixed value between the gate-on voltage and the gate-off voltage for a predetermined time.

Abstract: A tiled display device includes a first display module including a first display panel configured to display an image, and first top chassis blocks disposed to surround the first display panel, and a second display module including a second display panel configured to display an image associated with the image displayed in the first display panel, and second top chassis blocks disposed to surround the second display panel. The first and second display modules are disposed in a tiled form, and each of the first top chassis blocks and the second top chassis blocks are spaced apart from each other by a first distance.

Abstract: A display device includes: a timing controller to provide data including a pre-emphasis value and an image data value; a gamma reference voltage supplier to selectively supply one of a first gamma reference voltage and a second gamma reference voltage different from the first gamma reference voltage; and a data driver to supply a pre-emphasis voltage, that is generated based on the pre-emphasis value and the first gamma reference voltage, to data lines during a first period of a horizontal period, and to supply a data voltage, that is generated based on the image data value and the second gamma reference voltage, to the data lines during a second period of the horizontal period. The timing controller is to control the gamma reference voltage supplier to supply the first gamma reference voltage during the first period and to supply the second gamma reference voltage during the second period.

Abstract: A method of operating a display panel in which a plurality of decisions are generated by detecting transitions of a plurality of present pixel data included in a present frame image. A uniform dynamic capacitance compensation (DCC) is performed based on the plurality of decisions. A present grayscale of each of the plurality of present pixel data increases by a first compensation value, decreases by a second compensation value, or is maintained based on the uniform DCC.

Abstract: A data driver includes first through n-th shift register units, first through n-th latch units, and first through n-th output buffer units. The first through n-th shift register units shift and store a plurality of image output from a timing controller. The first shift register unit includes first through m-th shift registers. The first through m-th shift registers shift and store first through m-th image data among the plurality of image data. The first through n-th latch units are connected to the first through n-th shift register units, respectively. The first latch unit includes first through m-th latches. The first through n-th output buffer units are connected to the first through n-th latch units, respectively. The first output buffer unit includes first through m-th output buffers. The first through n-th latch units sequentially latch the plurality of image data stored in the first through n-th shift register units.

Abstract: A display apparatus includes a display panel which receives light to display an image, a backlight unit, which includes a light source providing the light to the display panel, and a support member supporting the display panel, at least one protrusion part disposed on a side surface of the display panel and protruding from the side surface of the display panel, and a coupling member disposed on the at least one protrusion part and coupled to the support member, where the display panel is fixed to the support member by the coupling member.

Abstract: A curved display device is provided. The curved display device includes: a curved display panel configured to have short sides and long sides; a printed circuit board (PCB) configured to provide signals for driving the curved display panel; and a flexible wiring board including a first portion, which is connected to a first area, a second portion, which is connected to the PCB, and a third portion, which is disposed between the first portion and the second portion and has curved sides, wherein a curvature radius of a first side of the curved sides differs from a curvature radius of a second side of the curved sides.

Abstract: A liquid crystal display device includes m gate lines, n data lines, and m×n pixels each connected to a corresponding gate line, each connected to a corresponding data line, and each including a first sub-pixel and a second sub-pixel, wherein the first sub-pixel includes a first liquid crystal capacitor, and a first transistor configured to receive a data signal from the corresponding data line, and configured to apply the data signal to the first liquid crystal capacitor, and wherein the second sub-pixel includes a second liquid crystal capacitor, a second transistor configured to apply the data signal to the second liquid crystal capacitor, and a third transistor configured to apply a storage voltage, which is configured to swing between a first electric potential level and a second electric potential level that is greater than the first electric potential level, to the second liquid crystal capacitor.

Abstract: A display apparatus includes a display panel including a display area in which gate lines and data lines are disposed to display an image and a peripheral area which is disposed around the display area and includes fan-out lines having different lengths, and a driving part configured to output driving signals having different levels to channels respectively connected to the fan-out lines according to the different lengths of the fan-out lines.

Abstract: A display device is provided which includes a display panel including a plurality of pixels; a gate driving unit configured to drive gate lines; a data driver configured to drive data lines; and a timing controller configured to generate a plurality of control signals for controlling the gate driving unit and the data driver. The timing controller converts the data signals into an image data signal, a horizontal synchronization signal, a vertical synchronization signal, and a data enable signal, a pulse width of each of the horizontal and vertical synchronization signals corresponding to an aspect ratio of the data signals or a size of a black image display area. The timing controller generates the plurality of control signals according to the image data signal, the data enable signal, and pulse widths of the horizontal synchronization signal and the vertical synchronization signal.