Abstract: A method of fabricating a solar cell includes forming an emitter layer of a second conductive type on a front surface and a back surface of a substrate of a first conductive type opposite to the second conductive type, forming an anti-reflection layer on the front surface of the substrate, partially removing the anti-reflection layer and the emitter layer to form an isolation groove dividing the emitter layer into a plurality of regions, removing a portion of the emitter layer formed on the back surface of the substrate, and forming a passivation layer covering the isolation groove and the back surface of the substrate.

Abstract: A solar cell includes a base substrate including a first surface and a second surface opposite the first surface, the base substrate being configured to have sunlight incident on the first surface, a doping layer on the first surface of the base substrate, a first passivation layer on the doping layer, the first passivation layer including hydrogen, a first capping layer on the first passivation layer, the first capping layer being configured to prevent discharge of hydrogen from the first passivation layer, a first electrode on the first capping layer, and a second electrode on the second surface of the base substrate.

Abstract: A method of fabricating a solar cell includes forming an emitter layer of a second conductive type on a front surface and a back surface of a substrate of a first conductive type opposite to the second conductive type, forming an anti-reflection layer on the front surface of the substrate, partially removing the anti-reflection layer and the emitter layer to form an isolation groove dividing the emitter layer into a plurality of regions, removing a portion of the emitter layer formed on the back surface of the substrate, and forming a passivation layer covering the isolation groove and the back surface of the substrate.

Abstract: Disclosed is a solar cell including; a semiconductor substrate including a p-type layer and an n-type layer, a dielectric layer disposed on a surface of the semiconductor substrate, wherein the dielectric layer includes a plurality of penetrating parts, a first electrode electrically connected to the p-type layer of the semiconductor substrate, and a second electrode electrically connected to the n-type layer of the semiconductor substrate, wherein the first electrode includes; a fusion part which comprises a melt blend of a semiconductor material and a metal material and which is disposed within the plurality of penetrating parts of the dielectric layer, and a metal part which includes a metal material and is disposed on a surface of one side of the dielectric layer.

Abstract: A method of fabricating a semiconductor device includes forming a lower device on a lower semiconductor substrate, and forming an interlayer insulating film on the lower device. An upper semiconductor substrate is formed on the interlayer insulating film such that the interlayer insulating film is between the lower and upper semiconductor substrates. Upper trenches are formed within the upper semiconductor substrate. An upper device isolating film is formed within the upper trenches. The upper device isolating film is irradiated with ultraviolet light having a wavelength configured to break chemical bonds of impurities in the upper device isolating film to reduce an impurity concentration thereof.

Abstract: A solar cell includes; a semiconductor substrate including a first conductive type part selected from one of a p-type and n-type material and a second conductive type part selected from p-type and n-type material different from the first conductive type part, and a plurality of contact holes penetrating from a first surface to a second surface of the semiconductor substrate, a first electrode disposed on the first surface of the semiconductor substrate and electrically connected to the second conductive type part, a second electrode disposed on the second surface of the semiconductor substrate and electrically connected to the first conductive type part, and a dielectric layer disposed between the semiconductor substrate and the second electrode in the contact hole, and a method of manufacturing the solar cell.

Abstract: A method of fabricating a three-dimensional semiconductor device is provided along with a three-dimensional semiconductor device fabricated thereby. The method includes forming a heat conductive plug to channel heat away from devices on a substrate, while high temperature processes are performed on a stacked semiconductor layer. The ability to use high temperature processes on the stacked semiconductor layer without adversely effecting devices on the substrate allows the formation of a high quality single-crystalline stacked semiconductor layer. The high quality single-crystalline semiconductor layer can then be used to fabricate improved thin film transistors.

Abstract: A method of fabricating a semiconductor device includes forming a lower device on a lower semiconductor substrate, and forming an interlayer insulating film on the lower device. An upper semiconductor substrate is formed on the interlayer insulating film such that the interlayer insulating film is between the lower and upper semiconductor substrates. Upper trenches are formed within the upper semiconductor substrate. An upper device isolating film is formed within the upper trenches. The upper device isolating film is irradiated with ultraviolet light having a wavelength configured to break chemical bonds of impurities in the upper device isolating film to reduce an impurity concentration thereof.

Abstract: A method of fabricating a three-dimensional semiconductor device is provided along with a three-dimensional semiconductor device fabricated thereby. The method includes forming a heat conductive plug to channel heat away from devices on a substrate, while high temperature processes are performed on a stacked semiconductor layer. The ability to use high temperature processes on the stacked semiconductor layer without adversely effecting devices on the substrate allows the formation of a high quality single-crystalline stacked semiconductor layer. The high quality single-crystalline semiconductor layer can then be used to fabricate improved thin film transistors.