Abstract: A sensor device includes: a sensor panel including sensors arranged in a matrix form and sensor lines electrically connected to the sensors one-to-one; and a sensor driver configured to receive sensing signals from the sensors through the sensor lines, wherein the sensor driver is configured to simultaneously receive a first sensing signal from a first sensor using a first reference signal and a second sensing signal from a second sensor using a second reference signal, wherein the first reference signal and the second reference signal have a same waveform, a phase of the second reference signal is different from a phase of the first reference signal, and wherein a phase of the second sensing signal is different from a phase of the first sensing signal.

Abstract: Disclosed herein is a method of fabricating a catalyzed porous electrode for fuel cell, which electrode can be fabricated in a simple and easy manner without forming a catalyst support layer of carbon particles, and has an excellent, stable catalytic efficiency. The method comprises treating an electrically conductive, porous carbon substrate with an oxidizing agent; making one face of the porous carbon substrate in contact with an electrodeposition solution As containing ions of a catalytic metal; applying a pulsed potential to the electrodeposition solution to deposit the catalytic metal on the porous substrate, thereby catalyzing the porous substrate; and heat-treating the catalyzed porous substrate.

Abstract: Method for fabricating a ferroelectric capacitor, including the steps of (1) foxing an etch stopper formed of any one of TiO2 and RuO2 a lower electrode, a ferroelectric layer, an upper electrode, and an etch mask layer formed of any one of Ti, Ru and Cr in succession on a substrate, (2) patterning the etch mask layer to a required form, (3) using the etch mask layer as a mask in etching the upper electrode, the ferroelectric layer, and the lower electrode at a time, to expose the etch stopper, and (4) removing the etch stopper and the etch mask layer, whereby allowing a simple and easy fabrication of the capacitor regardless of presence of steps.

Abstract: A method for designing a reticle mask with a reduced pattern by use of another larger reticle mask having a circuit pattern and scribe line patterns on lower and right edges of the circuit pattern. In the method, the larger circuit pattern is modified by forming two dummy scribe line regions at upper and left edges of the larger circuit pattern. The modified mask pattern is then reduced. The reduced mask pattern is repeatedly copied on a reticle frame region, with at least one of the dummy scribe line regions overlapping at least one of the scribe line regions of an adjacent reduced mask pattern.