Patents by Inventor Dong Duk Lee

Dong Duk Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240147853
    Abstract: An organic light emitting device comprising an anode, a cathode, and a light emitting layer between the anode and the cathode, the light emitting layer including a compound represented by Chemical Formula 1 and a compound represented by Chemical Formula 2, and having improved driving voltage, efficiency and lifetime.
    Type: Application
    Filed: July 21, 2022
    Publication date: May 2, 2024
    Inventors: Minjun Kim, Dong Hoon Lee, Sang Duk Suh, Young Seok Kim
  • Publication number: 20240138256
    Abstract: Provided is an organic light emitting device which includes a light emitting layer between an anode and a cathode, the light emitting layer comprising a compound of Chemical Formula 1 and a compound of Chemical Formula 2: where A?1 represents Chemical Formula 2-a, the dotted line is fused with an adjacent ring, Ar?1 is substituted or unsubstituted C6-60 aryl or C2-60 heteroaryl containing at least one of N, O and S, D is deuterium, and the other substituents are as defined in the specification. The organic light emitting device has excellent driving voltage, efficiency and lifespan when the compound of Chemical Formula 1 and the compound of Chemical Formula 2 are combined and used as a host for a red light emitting layer.
    Type: Application
    Filed: April 5, 2021
    Publication date: April 25, 2024
    Inventors: Minjun KIM, Dong Hoon LEE, Sang Duk SUH, Young Seok KIM
  • Patent number: 11955888
    Abstract: As inputs of a controller of a direct current (DC)-DC converter are sampled for a predetermined time and thus two-dimensional state information in which one axis is an input physical quantity and the other axis is a time is generated, the two-dimensional state information is processed by a convolutional neural network to determine and output one of a plurality of control signals. An artificial intelligence control part may operate in accordance with a plurality of operation conditions or dynamically determined operation conditions by applying different artificial intelligence engines according to operation modes.
    Type: Grant
    Filed: July 3, 2021
    Date of Patent: April 9, 2024
    Inventors: Kang Yoon Lee, Jong Wan Jo, Min Young Kim, Dong Soo Park, Kyung Duk Choi, Young Gun Pu
  • Publication number: 20240114770
    Abstract: An organic light emitting device having improved efficiency, driving voltage, and lifespan is provided. The organic light emitting device comprises an anode, a cathode, and a light emitting between the anode and the cathode, and the light emitting layer comprises a first compound represented by Chemical Formula 1 and a second compound represented by Chemical Formula 2.
    Type: Application
    Filed: February 23, 2022
    Publication date: April 4, 2024
    Inventors: Su Jin HAN, Dong Hoon LEE, Sang Duk SUH, Min Woo JUNG, Jungha LEE, Seulchan PARK, Sunghyun HWANG
  • Publication number: 20240114776
    Abstract: A compound of Chemical Formula 1 or 2 and an organic light emitting device including the same are provided. The compound, when used as a material for an organic material layer of an organic light emitting device, provides improved efficiency, low driving voltage, and enhanced lifespan of the organic light emitting device.
    Type: Application
    Filed: February 24, 2022
    Publication date: April 4, 2024
    Inventors: Minjun Kim, Dong Hoon Lee, Sang Duk Suh, Donghee Kim
  • Publication number: 20240107884
    Abstract: Provided is an organic light emitting device having improved driving voltage, efficiency and lifetime, the device comprising: an anode; a cathode; and a light emitting layer therebetween, wherein the light emitting layer comprises a compound of Chemical Formula 1 and a compound of Chemical Formula 2: wherein: any one of R?1 to R?12 is Chemical Formula 3, and the rest are hydrogen or deuterium: R1 is hydrogen, deuterium, or a substituted or unsubstituted C6-30 aryl or C2-60 heteroaryl containing one or more of N, O and S; Ar1, Ar2, Ar?1, and Ar?2 are each independently a substituted or unsubstituted C6-60 aryl or C2-60 heteroaryl containing one or more of N, O and S; and the other substituents are as defined in the specification.
    Type: Application
    Filed: February 21, 2022
    Publication date: March 28, 2024
    Inventors: Minjun KIM, Dong Hoon LEE, Sang Duk SUH, Young Seok KIM, Donghee KIM, Joongsuk OH, Da Jung LEE
  • Publication number: 20240099133
    Abstract: Provided is an organic light emitting device comprising an anode; a cathode; and a light emitting layer therebetween, the light emitting layer comprising a compound of Chemical Formula 1 and a compound of Chemical Formula 2, the device having improved driving voltage, efficiency and lifetime: wherein: any one of R?1 to R?12 is Chemical Formula 3, and the rest are hydrogen or deuterium: Ar1, Ar2, Ar?1, and Ar?2 are each independently a substituted or unsubstituted C6-60 aryl or C2-60 heteroaryl containing any one or more of N, O and S; R1 is hydrogen, deuterium, or a substituted or unsubstituted C6-60 aryl or C2-60 heteroaryl containing any one or more of N, O and S; and the other substituents are as defined in the specification.
    Type: Application
    Filed: February 18, 2022
    Publication date: March 21, 2024
    Inventors: Minjun KIM, Dong Hoon LEE, Sang Duk SUH, Young Seok KIM, Donghee KIM, Joongsuk OH, Da Jung LEE
  • Publication number: 20240083878
    Abstract: A compound represented by Chemical Formula 1 and an organic light emitting device including the same are provided. The compound is used as a material for an organic material layer of the organic light emitting device, and provides improved efficiency, low driving voltage, and increased lifespan of the organic light emitting device.
    Type: Application
    Filed: February 22, 2022
    Publication date: March 14, 2024
    Inventors: Min Woo Jung, Dong Hoon Lee, Sang Duk Suh, Jungha Lee, Su Jin Han, Seulchan Park, Sunghyun Hwang
  • Publication number: 20240081148
    Abstract: Provided is an organic light-emitting device having improved driving voltage, efficiency and lifespan, the device comprising an anode, a cathode, and a light emitting layer including a light emitting layer that includes a compound of Chemical Formula 1 and a compound of Chemical Formula 2 between the anode and the cathode: where Ar1 and Ar2 are each independently a substituted or unsubstituted C6-60 aryl or C2-60 heteroaryl containing at least one of N, O and S; R1 is each independently hydrogen or deuterium; R2 to R6 and R9 to R11 are each independently hydrogen or deuterium; one of R7 and R8 is ?and the other is hydrogen or deuterium; Ar3 and Ar4 are each independently a substituted or unsubstituted C6-60 aryl or C2-60 heteroaryl containing at least one of N, O and S; and the other substituents are as defined in the specification.
    Type: Application
    Filed: April 27, 2022
    Publication date: March 7, 2024
    Inventors: Minjun KIM, Dong Hoon LEE, Sang Duk SUH, Young Seok KIM, Donghee KIM, Joongsuk OH, Da Jung LEE
  • Patent number: 7476625
    Abstract: Disclosed is a method for fabricating a semiconductor device. The method includes: forming a first inter-layer insulation layer on a substrate provided with a plurality of cell contact plugs; selectively etching the first inter-layer insulation layer to form a plurality of first contact holes; performing a cleaning process to remove etch residues on lower portions of the first contact holes; forming insulating fences on inner walls of the first contact holes; forming a plurality of bit lines in contact with a group of the cell contact plugs through the respective first contact holes; forming a second inter-layer insulation layer over the plurality of bit lines; planarizing the second inter-layer insulation layer until an upper portion of each of the bit lines is exposed; and selectively etching the second inter-layer insulation layer in alignment with the bit lines, thereby obtaining a plurality of second contact holes.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: January 13, 2009
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Sung-Kwon Lee, Dong-Duk Lee
  • Patent number: 7442648
    Abstract: The present invention relates to a method for fabricating a semiconductor device using tungsten as a sacrificial hard mask material. The method includes the steps of: forming a layer on an etch target layer; forming a photoresist pattern on the layer; etching the layer by using the photoresist pattern as an etch mask along with use of a plasma containing CHF3 gas to form a sacrificial hard mask; and etching the etch target layer by using at least the sacrificial hard mask as an etch mask, thereby obtaining a predetermined pattern.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: October 28, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventors: Kwang-Ok Kim, Yun-Seok Cho, Seung-Chan Moon, Jin-Ki Jung, Sung-Kwon Lee, Jun-Hyeub Sun, Dong-Duk Lee, Jin-Woong Kim, Gyu-Han Yoon
  • Publication number: 20060292498
    Abstract: A method for forming a contact hole in a semiconductor device includes preparing a substrate including a bottom structure; forming an insulation layer such that the insulation layer covers the bottom structure; forming a silicon-rich oxynitride layer on the insulation layer; forming a photoresist pattern on the silicon-rich oxynitride layer; etching the silicon-rich oxynitride layer using the photoresist pattern as an etch mask, thereby obtaining hard masks; and etching the insulation layer using the photoresist pattern and the hard masks as an etch mask to form a contact hole exposing a portion of the bottom structure.
    Type: Application
    Filed: December 29, 2005
    Publication date: December 28, 2006
    Inventors: Chang-Youn Hwang, Dong-Duk Lee, Ik-Soo Choi, Hong-Gu Lee
  • Publication number: 20060094250
    Abstract: Disclosed is a method for fabricating a semiconductor device. The method includes: forming a first inter-layer insulation layer on a substrate provided with a plurality of cell contact plugs; selectively etching the first inter-layer insulation layer to form a plurality of first contact holes; performing a cleaning process to remove etch residues on lower portions of the first contact holes; forming insulating fences on inner walls of the first contact holes; forming a plurality of bit lines in contact with a group of the cell contact plugs through the respective first contact holes; forming a second inter-layer insulation layer over the plurality of bit lines; planarizing the second inter-layer insulation layer until an upper portion of each of the bit lines is exposed; and selectively etching the second inter-layer insulation layer in alignment with the bit lines, thereby obtaining a plurality of second contact holes.
    Type: Application
    Filed: September 29, 2005
    Publication date: May 4, 2006
    Inventors: Sung-Kwon Lee, Dong-Duk Lee
  • Publication number: 20060079093
    Abstract: The present invention relates to a method for fabricating a semiconductor device using tungsten as a sacrificial hard mask material. The method includes the steps of: forming a layer on an etch target layer; forming a photoresist pattern on the layer; etching the layer by using the photoresist pattern as an etch mask along with use of a plasma containing CHF3 gas to form a sacrificial hard mask; and etching the etch target layer by using at least the sacrificial hard mask as an etch mask, thereby obtaining a predetermined pattern.
    Type: Application
    Filed: June 10, 2005
    Publication date: April 13, 2006
    Inventors: Kwang-Ok Kim, Yun-Seok Cho, Seung-Chan Moon, Jin-Ki Jung, Sung-Kwon Lee, Jun-Hyeub Sun, Dong-Duk Lee, Jin-Woong Kim, Gyu-Han Yoon
  • Publication number: 20060003571
    Abstract: Disclosed is a method for forming a plurality of contact holes in a semiconductor device. The method includes the steps of: forming an oxide-based layer on a substrate; forming an organic polymer layer on the oxide-based layer; forming a photoresist pattern on the organic polymer layer to form the plurality of contact holes; etching the organic polymer layer by using the photoresist pattern as an etch mask, thereby forming a hard mask; etching the oxide-based layer by using the photoresist pattern and the hard mask as an etch mask; and removing the photoresist pattern and the hard mask by performing a photoresist strip process, thereby obtaining the plurality of contact holes.
    Type: Application
    Filed: December 22, 2004
    Publication date: January 5, 2006
    Applicant: Hynix Semiconductor, Inc.
    Inventors: Min-Suk Lee, Sung-Kwon Lee, Dong-Duk Lee
  • Patent number: 6426300
    Abstract: The present invention discloses a method for fabricating a semiconductor device using an etch-resistant polymer. The method includes a step for the in-situ generation of a polymer layer on the exposed surfaces of a photoresist film pattern, a pad oxide film, and a hard mask layer. This polymer acts as a protective film and prevents photoresist erosion during trench etching processes and improves the etch selectivity. As a result, trench structures can be formed more easily and with improved dimensional control.
    Type: Grant
    Filed: January 2, 2001
    Date of Patent: July 30, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Won Soung Park, Phil Goo Kong, Ho Seok Lee, Dong Duk Lee
  • Publication number: 20010018252
    Abstract: The present invention discloses a method for fabricating a semiconductor device using an etch-resistant polymer. The method includes a step for the in-situ generation of a polymer layer on the exposed surfaces of a photoresist film pattern, a pad oxide film, and a hard mask layer. This polymer acts as a protective film and prevents photoresist erosion during trench etching processes and improves the etch selectivity. As a result, trench structures can be formed more easily and with improved dimensional control.
    Type: Application
    Filed: January 2, 2001
    Publication date: August 30, 2001
    Inventors: Won Soung Park, Phil Goo Kong, Ho Seok Lee, Dong Duk Lee
  • Publication number: 20010005622
    Abstract: A method for manufacturing a gate electrode, the method including the steps of forming upon a semiconductor substrate a polysilicon layer, a metal nitride layer, a tungsten layer and a photoresist layer, patterning the photoresist layer on the tungsten layer into a predetermined configuration, etching the tungsten layer, the metal nitride layer, a portion of the polysilicon layer into the predetermined configuration by using a mixed etchant of fluorine and chlorine species etchant, and patterning the remaining polysilicon layer into the predetermined configuration by using chlorine etchant.
    Type: Application
    Filed: December 15, 2000
    Publication date: June 28, 2001
    Inventors: Jun-Dong Kim, Young-Hun Bae, Tae-Woo Jung, Dong-Duk Lee