Abstract: The disclosure relates to a display device and a method of manufacturing a display device. A display device according to embodiments of the present specification includes a substrate including a display area and a non-display area, a driving circuit part disposed in the display area on the substrate; a plurality of planarization layers disposed on the driving circuit part, and a plurality of pixels disposed on the plurality of planarization layers in the display area, wherein the plurality of pixels include a plurality of first light-emitting element areas and a plurality of second light-emitting element areas, and a first insulating layer is disposed in the first light-emitting element area and the second light-emitting element area, and the first insulating layer may have different heights in the first light-emitting element area and the second light-emitting element area.

Abstract: A display device includes a plurality of electrode pads which are arranged in a non-display region having a side line of a substrate; a circuit film which includes a plurality of output pads contacting the plurality of electrode pads and extending in a direction, and on which a driving IC is mounted; a plurality of test lines that extend in the direction from the side line; and a plurality of connection lines which connect the plurality of test lines to corresponding electrode pads, wherein each test line is located in a separate region between two output pads adjacent to both sides of each test line.

Abstract: A display device includes a plurality of electrode pads which are arranged in a non-display region having a side line of a substrate; a circuit film which includes a plurality of output pads contacting the plurality of electrode pads and extending in a direction, and on which a driving IC is mounted; a plurality of test lines that extend in the direction from the side line; and a plurality of connection lines which connect the plurality of test lines to corresponding electrode pads, wherein each test line is located in a separate region between two output pads adjacent to both sides of each test line.