Patents by Inventor Dong-Gi Choi

Dong-Gi Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240109397
    Abstract: A method for controlling an electric heater of a vehicular heating, ventilation, and air conditioning (HVAC) system includes turning on the electric heater; determining whether an ambient air temperature of a vehicle is higher than or equal to a threshold ambient air temperature, and a battery temperature is lower than or equal to a threshold battery temperature; determining whether battery efficiency is lower than or equal to threshold efficiency when the ambient air temperature of the vehicle is higher than or equal to the threshold ambient air temperature, and the battery temperature is lower than or equal to the threshold battery temperature; and turning off the electric heater when the battery efficiency is lower than or equal to the threshold efficiency, wherein the electric heater is configured to receive electric energy from the battery.
    Type: Application
    Filed: March 30, 2023
    Publication date: April 4, 2024
    Inventors: Dae Hyun Song, Chang Gi Ryu, Woo Jin Lee, Dong Ju Ko, Hyun Hun Choi, Chun Kyu Kwon, In Uk Ko
  • Publication number: 20240081124
    Abstract: A display device includes a via insulating layer on a substrate; a first electrode on the via insulating layer; a pixel defining layer including an inclined region on the first electrode and including a first opening exposing a portion of the first electrode, and a flat region at a side of the inclined region and in contact with the via insulating layer; a light emitting layer on the portion of the first electrode exposed by the first opening; organic particles on the flat region of the pixel defining layer; an encapsulation layer covering the pixel defining layer, the light emitting layer, and the organic particles, and including a first layer, a second layer, and a third layer; and a first light blocking layer on the third layer of the encapsulation layer to overlap the flat region of the pixel defining layer and form a second opening.
    Type: Application
    Filed: May 8, 2023
    Publication date: March 7, 2024
    Applicant: Samsung Display Co., LTD.
    Inventors: Hyun Ho KIM, Dong Uk KIM, Hyoeng Ki KIM, Hyeon Bum LEE, Hoon Gi LEE, Chaun Gi CHOI
  • Publication number: 20230014724
    Abstract: The present invention relates to an apparatus and method for manufacturing a secondary battery. The apparatus for manufacturing a secondary battery comprises a fixing part configured to press and fix a cell comprising an electrode assembly, an electrolyte, and a battery case configured to accommodate the electrode assembly and the electrolyte, wherein the cell is fixed so that a gas pocket part is disposed above a main body of the battery case, a piercing part configured to pierce the fixed cell through a knife so as to form a gas discharge hole, a vacuum part through which the cell is maintained in a vacuum state, and an internal gas of the cell is discharged to the outside, a leakage prevention part configured to prevent the electrolyte from leaking by pressing the gas pocket part of the cell, in which the internal gas is discharged through the vacuum part, through a leakage prevention block, and a pre-sealing part configured to seal the gas pocket part.
    Type: Application
    Filed: December 28, 2020
    Publication date: January 19, 2023
    Applicant: LG Energy Solution, Ltd.
    Inventors: Dong Gi Choi, Sang Don Lee, Yoon Jong Oh, Sang Uk Yeo
  • Patent number: 6664140
    Abstract: An integrated circuit includes first and second diodes that are electrically connected to a conductive line in antiparallel, to dissipate both positive and negative charges on the conductive line during plasma processing. The integrated circuit also includes a fuse for disconnecting one of the first and second diodes from the conductive line after the plasma processing, to thereby allow conduction of one of positive and negative charge on the conductive line after the plasma processing. Accordingly, integrated circuits are fabricated by forming a conductive line on an integrated circuit substrate and first and second diodes in the integrated circuit substrate that are electrically connected to the conductive line in antiparallel. Then, plasma processing is performed on the integrated circuit substrate including the conductive line and the first and second diodes, such that the first and second diodes dissipate both positive and negative charges on the conductive line during the plasma processing.
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: December 16, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Young Lee, Dong-Gi Choi
  • Publication number: 20020061630
    Abstract: An integrated circuit includes first and second diodes that are electrically connected to a conductive line in antiparallel, to dissipate both positive and negative charges on the conductive line during plasma processing. The integrated circuit also includes a fuse for disconnecting one of the first and second diodes from the conductive line after the plasma processing, to thereby allow conduction of one of positive and negative charge on the conductive line after the plasma processing. Accordingly, integrated circuits are fabricated by forming a conductive line on an integrated circuit substrate and first and second diodes in the integrated circuit substrate that are electrically connected to the conductive line in antiparallel. Then, plasma processing is performed on the integrated circuit substrate including the conductive line and the first and second diodes, such that the first and second diodes dissipate both positive and negative charges on the conductive line during the plasma processing.
    Type: Application
    Filed: January 16, 2002
    Publication date: May 23, 2002
    Inventors: Ki-Young Lee, Dong-Gi Choi
  • Patent number: 6365938
    Abstract: An integrated circuit includes first and second diodes that are electrically connected to a conductive line in antiparallel, to dissipate both positive and negative charges on the conductive line during plasma processing. The integrated circuit also includes a fuse for disconnecting one of the first and second diodes from the conductive line after the plasma processing, to thereby allow conduction of one of positive and negative charge on the conductive line after the plasma processing. Accordingly, integrated circuits are fabricated by forming a conductive line on an integrated circuit substrate and first and second diodes in the integrated circuit substrate that are electrically connected to the conductive line in antiparallel. Then, plasma processing is performed on the integrated circuit substrate including the conductive line and the first and second diodes, such that the first and second diodes dissipate both positive and negative charges on the conductive line during the plasma processing.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: April 2, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Young Lee, Dong-Gi Choi
  • Publication number: 20010042887
    Abstract: An integrated circuit includes first and second diodes that are electrically connected to a conductive line in antiparallel, to dissipate both positive and negative charges on the conductive line during plasma processing. The integrated circuit also includes a fuse for disconnecting one of the first and second diodes from the conductive line after the plasma processing, to thereby allow conduction of one of positive and negative charge on the conductive line after the plasma processing. Accordingly, integrated circuits are fabricated by forming a conductive line on an integrated circuit substrate and first and second diodes in the integrated circuit substrate that are electrically connected to the conductive line in antiparallel. Then, plasma processing is performed on the integrated circuit substrate including the conductive line and the first and second diodes, such that the first and second diodes dissipate both positive and negative charges on the conductive line during the plasma processing.
    Type: Application
    Filed: June 14, 1999
    Publication date: November 22, 2001
    Inventors: KI-YOUNG LEE, DONG-GI CHOI
  • Patent number: 5817179
    Abstract: An improved gallium arsenide anneal boat and method for annealing comprises a slot structure for holding a wafer-stack of first and second GaAs wafers and a silicon wafer in the slot structure prior to annealing. The silicon wafer is tightly held in a central slot to maintain a vertical position and the GaAs wafers are loosely held in outside slots to avoid the formation of slip lines. The GaAs wafers slightly adhere to the silicon wafer to maintain a vertical position to avoid bending. Additionally, the wafer-stacks are separated by more than about 1.25 inches and processed in arsine gas at about 1 atm. pressure to avoid hazing.
    Type: Grant
    Filed: January 23, 1997
    Date of Patent: October 6, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Gi Choi, Hyungmo Yoo