Patents by Inventor Dong Gu Choi

Dong Gu Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9728540
    Abstract: A semiconductor device includes a spacer having a nitride/oxide/nitride (NON) structure. The spacer is disposed between a sidewall of a bit line and a bit line contact and a sidewall of a storage node contact plug to reduce coupling capacitance between the bit line and a storage node contact plug and between the bit line contact and the storage node contact plug.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: August 8, 2017
    Assignee: SK HYNIX INC.
    Inventors: Ky Hyun Han, Chang Heon Park, Dong Gu Choi
  • Publication number: 20160322364
    Abstract: A semiconductor device includes a spacer having a nitride/oxide/nitride (NON) structure. The spacer is disposed between a sidewall of a bit line and a bit line contact and a sidewall of a storage node contact plug to reduce coupling capacitance between the bit line and a storage node contact plug and between the bit line contact and the storage node contact plug.
    Type: Application
    Filed: July 12, 2016
    Publication date: November 3, 2016
    Inventors: Ky Hyun HAN, Chang Heon PARK, Dong Gu CHOI
  • Patent number: 9419002
    Abstract: A semiconductor device includes a spacer having a nitride/oxide/nitride (NON) structure. The spacer is disposed between a sidewall of a bit line and a bit line contact and a sidewall of a storage node contact plug to reduce coupling capacitance between the bit line and a storage node contact plug and between the bit line contact and the storage node contact plug.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: August 16, 2016
    Assignee: SK HYNIX INC.
    Inventors: Ky Hyun Han, Chang Heon Park, Dong Gu Choi
  • Publication number: 20150235950
    Abstract: A semiconductor device includes a spacer having a nitride/oxide/nitride (NON) structure. The spacer is disposed between a sidewall of a bit line and a bit line contact and a sidewall of a storage node contact plug to reduce coupling capacitance between the bit line and a storage node contact plug and between the bit line contact and the storage node contact plug.
    Type: Application
    Filed: August 29, 2014
    Publication date: August 20, 2015
    Inventors: Ky Hyun HAN, Chang Heon PARK, Dong Gu CHOI
  • Patent number: 6227052
    Abstract: Disclosed is a method for testing the photoinduced domain switching of ferroelectric ceramics using AE. A ferroelectric ceramic specimen 4 was tested for the AE signal and photovoltaic current upon application of light. Light emanating from a xenon lamp 1 is focused into a specimen 4 through a waveguide 2 and a lens 3. Raw AE signals are detected through an AE sensor 5. The output signals from the AE sensor 5 are forwarded to a bandpass filter 7 which filtered the signals. Then, the AE signals are amplified by 40 dB by a pre-amplifier 8 and further by 30 dB by an AET 5500 system 10 which is connected to a computer 9 for analyzing the signals. The AE events which show a peak amplitude greater than or as great as a predetermined threshold voltage are counted with respect to an irradiation period of time, followed by calculating an occurrence rate of the AE event counts. From these data, the activity of the photoinduced domain switching can be qualitatively evaluated.
    Type: Grant
    Filed: June 25, 1999
    Date of Patent: May 8, 2001
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Si Kyung Choi, Dong Gu Choi, Sung Ryul Kim