Patents by Inventor Dong Han

Dong Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11964464
    Abstract: A tape includes: a substrate, a conductive adhesive layer disposed on the substrate, and an insulating layer disposed on a part of a bonding surface of the conductive adhesive layer. The insulating layer is configured to insulate the conductive adhesive layer from a conducting part of an object to be bonded.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: April 23, 2024
    Assignees: Beijing BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Dong Cui, Rui Han, Qing Ma, Zeyuan Tong, Zhipeng Zhang, Fengping Wang, Yue Zhai, Zan Zhang, Wenyang Li, Weining Chi, Rui Tan, Shouyang Leng
  • Patent number: 11957476
    Abstract: Disclosed is a method of identifying dementia by at least one processor of a device. The method includes performing a first task that causes a first object to be displayed on a first region of a screen displayed on a user terminal; and when a preset condition is satisfied, performing a second task that causes at least one object, which induces the user's gaze, to be displayed instead of the first object on the screen of the user terminal.
    Type: Grant
    Filed: November 23, 2022
    Date of Patent: April 16, 2024
    Assignee: HAII CO, LTD.
    Inventors: Ho Yung Kim, Bo Hee Kim, Dong Han Kim, Hye Bin Hwang, Chan Yeong Park, Ji An Choi
  • Publication number: 20240118781
    Abstract: A method for processing contents at an electronic device is provided. The method includes generating a first content corresponding to a user input applied to content via the electronic device, and displaying a floating user interface (UI), which displays first scrap information on the first content, on a screen of the electronic device.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 11, 2024
    Inventors: Kyung-Hwan KIM, Dong-Jeon KIM, Jin-Hong JEONG, Hye-Soon JEONG, Se-Jun SONG, Yo-Han LEE
  • Publication number: 20240122006
    Abstract: A display device includes a data conductive layer including a first power line, a passivation layer with a first opening exposing the first power line, a via layer with a second opening partially overlapping the first opening, a pixel electrode on the via layer, a connection electrode in the first and second openings, a pixel-defining film with an opening overlapping the second opening, a light-emitting layer on the pixel-defining film, the pixel electrode and the connection electrode, and a common electrode connected to the first power line. The data conductive layer includes a data base layer, a data main metal layer, and a data capping layer, the first power line includes a wire connection structure, in which the data main metal layer is recessed from sides of the data capping layer, and the common electrode is connected to the data main metal layer in the wire connection structure.
    Type: Application
    Filed: August 28, 2023
    Publication date: April 11, 2024
    Inventors: Shin Hyuk YANG, Dong Han KANG, Jee Hoon KIM, Sung Gwon MOON, Seung Sok SON, Woo Geun LEE
  • Publication number: 20240120342
    Abstract: A transistor array substrate includes a substrate, an active layer disposed on the substrate and including a channel region, a source region and a drain region, a gate insulating layer disposed on a part of the active layer, a gate electrode overlapping the channel region of the active layer and included in an electrode conductive layer which is disposed on the gate insulating layer, a source electrode included in the electrode conductive layer and in contact with a part of the source region of the active layer, and a drain electrode included in the electrode conductive layer and in contact with a part of the drain region of the active layer. The active layer includes an oxide semiconductor including crystals and is disposed as an island shape excluding a hole in a plan view.
    Type: Application
    Filed: June 10, 2023
    Publication date: April 11, 2024
    Inventors: Sung Gwon MOON, Dong Han KANG, Jee Hoon KIM, Seung Sok SON, Shin Hyuk YANG, Woo Geun LEE
  • Patent number: 11955157
    Abstract: A PUF apparatus comprises: a PUF cell array in which a plurality of PUF cells are arranged each including a FeFET pair whose gates are commonly connected to a corresponding word line among a plurality of word lines, and whose drains and sources are connected to a corresponding bit line pair and a corresponding source line pair among a plurality of bit line pairs and a plurality of source line pairs running in a direction crossing the plurality of word lines; and a read-write-back block which is activated according to a read enable signal, and senses and amplifies a voltage difference occurring in a corresponding bit line pair among the plurality of bit line pairs according to the difference in driving strength due to a deviation in a manufacturing process of the FeFET pair in the PUF cell selected by a selected word line among the plurality of word lines.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: April 9, 2024
    Assignee: INDUSTRY-ACADEMIC CORPORATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Seong Ook Jung, Se Hee Lim, Tae Woo Oh, Se Keon Kim, Dong Han Ko
  • Patent number: 11955155
    Abstract: A nonvolatile memory device according to the embodiment includes: a first inverter; and a second inverter cross-coupled to the first inverter, wherein the second inverter includes a pull-up transistor, a pull-down transistor, and a ferroelectric field effect transistor having gate nodes connected to each other, and a restore transistor having one electrode connected to the ferroelectric field effect transistor, and the second inverter stores data in a nonvolatile manner.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: April 9, 2024
    Assignee: UIF (UNIVERSITY INDUSTRY FOUNDATION), YONSEI UNIVERSITY
    Inventors: Seong Ook Jung, Se Keon Kim, Tae Woo Oh, Se Hee Lim, Dong Han Ko
  • Patent number: 11948808
    Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: April 2, 2024
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Dong Jin Kim, Jin Han Kim, Won Chul Do, Jae Hun Bae, Won Myoung Ki, Dong Hoon Han, Do Hyung Kim, Ji Hun Lee, Jun Hwan Park, Seung Nam Son, Hyun Cho, Curtis Zwenger
  • Patent number: 11941249
    Abstract: A memory device, a host device and a memory system are provided. The memory device may include a plurality of storage units configured to store data, and at least one device controller configured to, receive a read command from at least one host device and to read data stored in the plurality of storage units in response to the read command, the at least one host device including at least one host memory including a plurality of HPB (high performance boosting) entry storage regions, and provide the at least one host device with a response command, the response command indicating an activation or deactivation of the plurality of HPB entry storage regions, the response command including HPB entry type information which indicates a HPB entry type of the HPB entry storage region.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: March 26, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Woo Kim, Jae Sun No, Byung June Song, Kyoung Back Lee, Wook Han Jeong
  • Publication number: 20240097454
    Abstract: Disclosed are an emergency control method and system based on source-load-storage regulation and cutback. According to the method, output power of power generating sources is regulated according to a power regulating quantity and a frequency regulation requirement, an output power compensation and output frequency of each power generating source are maintained within permissible ranges, so that a balance between power supply and demand of a power distribution network is maintained; and standby energy-storage power stations are used to make up a power gap, and an external power supply system is used to assist in making up a power deficiency, so that large load disturbance can be handled make up the power gap.
    Type: Application
    Filed: July 30, 2021
    Publication date: March 21, 2024
    Applicants: NANJING UNIVERSITY OF POASTS AND TELECOMMUNICATIONS, STATE GRID ELECTRIC POWER RESEARCH INSTITUTE CO. LTD
    Inventors: Dong YUE, Chunxia DOU, Zhijun ZHANG, Wenbin YUE, Xiaohua DING, Jianbo LUO, Yanman LI, Kun HUANG, Tao HAN
  • Publication number: 20240099085
    Abstract: A display device includes a pixel. The pixel is electrically connected to a first power line, a second power line, and a data line. The pixel includes a first transistor, and a capacitor electrically connected between a gate electrode of the first transistor and an electrode of the first transistor. In a plan view, the data line extends in a second direction. The first power line extends in a first direction intersecting the second direction and overlaps the data line and the gate electrode of the first transistor. The second power line extends in the second direction, overlaps the data line, and overlaps the gate electrode of the first transistor.
    Type: Application
    Filed: August 8, 2023
    Publication date: March 21, 2024
    Applicant: Samsung Display Co., LTD.
    Inventors: Sung Chan HWANG, Dong Hyun KIM, Chul Kyu KANG, Hey Jin SHIN, Seo Won CHOE, Chae Han HYUN
  • Publication number: 20240099154
    Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Applicant: UNITED MICROELECTRONICS CORP
    Inventors: Hui-Lin Wang, Si-Han Tsai, Dong-Ming Wu, Chen-Yi Weng, Ching-Hua Hsu, Ju-Chun Fan, Yi-Yu Lin, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang
  • Patent number: 11934337
    Abstract: An electronic device includes a CPU, an acceleration module, and a memory. The acceleration module is communicatively connected with the CPU, and includes chips. The chip according to an embodiment includes a data bus, and a memory, a data receiver, a computing and processing unit, and a data transmitter connected to the data bus. The data receiver receives first data and header information from outside, writes the first data to a corresponding area of the memory through the data bus, and configures a corresponding computing and processing unit and/or data transmitter according to the header information. The computing and processing unit receives first task information, performs an operation processing according to the first task information and a configuration operation on the data transmitter. The data transmitter obtains second task information and second data, and outputs third data to outside based on at least part of the second data.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: March 19, 2024
    Assignee: ANHUI CAMBRICON INFORMATION TECHNOLOGY CO., LTD.
    Inventors: Yao Zhang, Shaoli Liu, Dong Han
  • Patent number: 11935792
    Abstract: A method for fabricating a semiconductor device includes forming a trench in a substrate, forming a gate dielectric layer on a surface of the trench, forming a lower gate, which partially fills the trench, over the gate dielectric layer, forming a low work function layer over the lower gate, forming a spacer over the low work function layer, etching the low work function layer to be self-aligned with the spacer in order to form vertical gate on both upper edges of the lower gate, and forming an upper gate over the lower gate between inner sidewalls of the vertical gate.
    Type: Grant
    Filed: May 12, 2023
    Date of Patent: March 19, 2024
    Assignee: SK hynix Inc.
    Inventors: Dong-Soo Kim, Se-Han Kwon
  • Publication number: 20240081722
    Abstract: A method of identifying dementia is disclosed that includes causing a user terminal to display an N-th screen including a plurality of objects. The user terminal may further display an N+1-th screen with the objects rearranged at positions on the N+1-th screen which are different from positions of the objects included in the N-th screen when an N-th selection input of selecting any one from among the objects included in the N-th screen is received. When an N+1-th selection input for selecting any one from among the objects included in the N+1-th screen is received, a third task of determining whether an answer of the N+1-th selection input is correct is performed based on whether the object selected from the N+1-th selection input is the same as at least one object selected from at least one previous selection input including the N-th selection input.
    Type: Application
    Filed: July 7, 2022
    Publication date: March 14, 2024
    Applicant: HAII corp.
    Inventors: Ho Yung KIM, Geon Ha KIM, Bo Hee KIM, Dong Han KIM, Hye Bin HWANG, Chan Yeong PARK, Ji An CHOI, Bo Ri KIM
  • Publication number: 20240090168
    Abstract: A liquid cooling device includes a base plate, a cooling body, and a cover plate. The cooling body includes a frame. A cooling layer is provided in the frame and a reflux layer is provided above the cooling layer. The cooling layer is provided with a plurality of cooling channels extending from a center portion of the cooling body to the frame. The reflux layer is provided with a plurality of reflux channels in communication with the plurality of cooling channels. A periphery of the reflux layer is provided with a drainage flow channel in communication with the plurality of the reflux channels. A center portion of the cover plate being provided with a liquid inlet in communication with the plurality of cooling channels, and the cover plate is further provided with a liquid outlet in communication with the drainage flow channel.
    Type: Application
    Filed: March 20, 2023
    Publication date: March 14, 2024
    Inventors: JIANG-JUN WU, YI-DONG JI, SHU-KANG HAN, KE SUN
  • Publication number: 20240088432
    Abstract: An embodiment sulfur dioxide-based inorganic electrolyte is provided in which the sulfur dioxide-based inorganic electrolyte is represented by a chemical formula M·(A1·Cl(4-x)Fx)z·ySO2. In this formula, M is a first element selected from the group consisting of Li, Na, K, Ca, and Mg, A1 is a second element selected from the group consisting of Al, Fe, Ga, and Cu, x satisfies a first equation 0?x?4, y satisfies a second equation 0?y?6, and z satisfies a third equation 1?z?2.
    Type: Application
    Filed: April 12, 2023
    Publication date: March 14, 2024
    Inventors: Kyu Ju Kwak, Won Keun Kim, Eun Ji Kwon, Samuel Seo, Yeon Jong Oh, Kyoung Han Ryu, Dong Hyun Lee, Han Su Kim, Ji Whan Lee, Seong Hoon Choi, Seung Do Mun
  • Publication number: 20240083305
    Abstract: A seat-interlocking leg rest control system includes: a first actuator configured to move a seat for a vehicle, the seat including a seat cushion and a seatback, in a forward-backward direction or an upward-downward direction of the vehicle; a second actuator configured to rotate a leg rest, rotatably coupled to the front end portion of the seat cushion, in the upward-downward direction; and a controller connected to the first actuator and the second actuator to control operation of the second actuator such that the rotation angle of the leg rest is limited based on the position of the seat.
    Type: Application
    Filed: March 8, 2023
    Publication date: March 14, 2024
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION
    Inventors: Kug Hun Han, Hoon Bok Lee, Yo Han Kim, Mun Seung Kang, Dong Hoon Keum, Deok Soo Lim, Dong Hoon Lee
  • Publication number: 20240081849
    Abstract: Provided herein is a mechanism to controllably move a wire within a flexible tubular member, the wire including opposed wire ends extending outwardly of a proximal end of the flexible tubular member, comprising a drive mechanism and a coupling located between the drive mechanism and the wire end, wherein movement of the coupling in the direction of the wire end results in opposed motion of the wire end.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Inventors: Daniel H. KIM, Dong Suk SHIN, Taeho JANG, Yongman PARK, Jeihan LEE, Hongmin KIM, Kihoon NAM, Seokyung HAN
  • Patent number: 11925726
    Abstract: The present disclosure is related to a perfusable-type bio-dual proximal tubule cell construct and a producing method thereof capable of applying an in vitro artificial organ model configured to include a first bioink comprising a decellularized substance derived from a mammalian kidney tissue and human umbilical vascular endothelial cells (HUVECs) and a second bioink comprising the decellularized substance and renal proximal tubular epithelial cells (RPTECs), wherein the first bioink and the second bioink are coaxial and printed in tubular constructs having different inner diameters. According to the present disclosure, it is possible to use the renal proximal tubule-on-a-chip as a bioreactor capable of observing a biological drug reaction similar to a real drug by perfusing various drugs to the renal proximal tubule-on-a-chip.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: March 12, 2024
    Assignees: POSTECH RESEARCH AND BUSINESS DEVELOPMENT FOUNDATION, THE CATHOLIC UNIVERSITY OF KOREA INDUSTRY—ACADEMIC COOPERATION FOUNDATION
    Inventors: Dong-Woo Cho, Wonil Han, Narendra K. Singh, Yong Kyun Kim, Sun Ah Nam