Patents by Inventor Dong-hoon Ham
Dong-hoon Ham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11270749Abstract: A storage device may include a monitoring module which monitors a characteristic degradation rate of a plurality of blocks included in a cell array of a nonvolatile memory; a group management module which designates the plurality of blocks as one or more groups, on the basis of a monitoring result of the monitoring module; a refresh period management module which determines refresh periods for each of the one or more groups; and a processor which performs refresh on the one or more groups in accordance with the determined refresh periods.Type: GrantFiled: March 31, 2021Date of Patent: March 8, 2022Assignee: Samsung Electronics Co., LtdInventors: Sang Won Jung, Shin Ho Oh, Dong Hoon Ham
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Publication number: 20210217465Abstract: A storage device may include a monitoring module which monitors a characteristic degradation rate of a plurality of blocks included in a cell array of a nonvolatile memory; a group management module which designates the plurality of blocks as one or more groups, on the basis of a monitoring result of the monitoring module; a refresh period management module which determines refresh periods for each of the one or more groups; and a processor which performs refresh on the one or more groups in accordance with the determined refresh periods.Type: ApplicationFiled: March 31, 2021Publication date: July 15, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Sang Won JUNG, Shin Ho OH, Dong Hoon HAM
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Patent number: 10991412Abstract: A storage device may include a monitoring module which monitors a characteristic degradation rate of a plurality of blocks included in a cell array of a nonvolatile memory; a group management module which designates the plurality of blocks as one or more groups, on the basis of a monitoring result of the monitoring module; a refresh period management module which determines refresh periods for each of the one or more groups; and a processor which performs refresh on the one or more groups in accordance with the determined refresh periods.Type: GrantFiled: September 24, 2020Date of Patent: April 27, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Sang Won Jung, Shin Ho Oh, Dong Hoon Ham
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Publication number: 20210012830Abstract: A storage device may include a monitoring module which monitors a characteristic degradation rate of a plurality of blocks included in a cell array of a nonvolatile memory; a group management module which designates the plurality of blocks as one or more groups, on the basis of a monitoring result of the monitoring module; a refresh period management module which determines refresh periods for each of the one or more groups; and a processor which performs refresh on the one or more groups in accordance with the determined refresh periods.Type: ApplicationFiled: September 24, 2020Publication date: January 14, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Sang Won Jung, Shin Ho Oh, Dong Hoon Ham
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Patent number: 10811074Abstract: A storage device may include a monitoring module which monitors a characteristic degradation rate of a plurality of blocks included in a cell array of a nonvolatile memory; a group management module which designates the plurality of blocks as one or more groups, on the basis of a monitoring result of the monitoring module; a refresh period management module which determines refresh periods for each of the one or more groups; and a processor which performs refresh on the one or more groups in accordance with the determined refresh periods.Type: GrantFiled: April 23, 2019Date of Patent: October 20, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Sang Won Jung, Shin Ho Oh, Dong Hoon Ham
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Publication number: 20200043544Abstract: A storage device may include a monitoring module which monitors a characteristic degradation rate of a plurality of blocks included in a cell array of a nonvolatile memory; a group management module which designates the plurality of blocks as one or more groups, on the basis of a monitoring result of the monitoring module; a refresh period management module which determines refresh periods for each of the one or more groups; and a processor which performs refresh on the one or more groups in accordance with the determined refresh periods.Type: ApplicationFiled: April 23, 2019Publication date: February 6, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Sang Won JUNG, Shin Ho Oh, Dong Hoon Ham
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Patent number: 9984757Abstract: An operating method of a memory controller, configured to control a non-volatile memory device that performs a refresh read operation, detects a power on state or power off state of the non-volatile memory device and issues a refresh read command. The non-volatile memory device that receives the refresh read command is controlled to perform, one time, the refresh read operation including a read operation on one of a plurality of word lines with respect to each of the plurality of memory blocks.Type: GrantFiled: November 15, 2016Date of Patent: May 29, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Joon-Ho Lee, Sil-Wan Chang, Hyun-Jin Choi, Dong-Hoon Ham
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Publication number: 20170337979Abstract: An operating method of a memory controller, configured to control a non-volatile memory device that performs a refresh read operation, detects a power on state or power off state of the non-volatile memory device and issues a refresh read command. The non-volatile memory device that receives the refresh read command is controlled to perform, one time, the refresh read operation including a read operation on one of a plurality of word lines with respect to each of the plurality of memory blocks.Type: ApplicationFiled: November 15, 2016Publication date: November 23, 2017Inventors: JOON-HO LEE, SIL-WAN CHANG, HYUN-JIN CHOI, DONG-HOON HAM
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Patent number: 9715444Abstract: Disclosed is a method of writing data in a storage device including a nonvolatile memory device. The method includes receiving write data with a write request, detecting a number of free blocks, if the detected number of free blocks is less than a threshold value, allocating a log block only in accordance with a sub-block unit, but if the detected number of free blocks is not less than the threshold value, allocating the log block in accordance with one of the sub-block unit and a physical block unit, wherein the sub-block unit is smaller than the physical block unit.Type: GrantFiled: March 6, 2013Date of Patent: July 25, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Joonho Lee, Jong-Nam Baek, Dong-Hoon Ham, Sang-Wook Yoo, Intae Hwang
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Patent number: 9658956Abstract: Disclosed is a method of writing data in a storage device including a nonvolatile memory device. The method includes receiving write data with a write request, detecting a number of free blocks, if the detected number of free blocks is less than a threshold value, allocating a log block only in accordance with a sub-block unit, but if the detected number of free blocks is not less than the threshold value, allocating the log block in accordance with one of the sub-block unit and a physical block unit, wherein the sub-block unit is smaller than the physical block unit.Type: GrantFiled: March 6, 2013Date of Patent: May 23, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Joonho Lee, Jong-Nam Baek, Dong-Hoon Ham, Sang-Wook Yoo, Intae Hwang
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Patent number: 9257192Abstract: A memory system, including a flash memory including multiple memory blocks, and a controller configured to erase each of the memory blocks using multiple steps. The controller stores, for each of the memory blocks, metadata indicating which of the multiple steps have been completed, and erases each of the memory blocks based on the stored metadata.Type: GrantFiled: February 5, 2014Date of Patent: February 9, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Joon-Ho Lee, Jong-Nam Baek, Dong-Hoon Ham, Sang-Wook Yoo, In-Tae Hwang
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Patent number: 9190155Abstract: A memory system includes a flash memory including a block having first sub-blocks and second sub-blocks different from each other, the second sub-blocks including free pages only; and a controller configured to erase the flash memory in units of the sub-blocks, and in a garbage collection operation, the controller is configured to copy data of a valid page of the first sub-blocks to at least one of the second sub-blocks.Type: GrantFiled: January 15, 2014Date of Patent: November 17, 2015Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Joon-Ho Lee, Jong-Nam Baek, Dong-Hoon Ham, Sang-Wook Yoo, In-Tae Hwang
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Patent number: 9158622Abstract: Disclosed is a storage device which includes a nonvolatile memory device including a memory block a program order of which is adjusted regardless of an arrangement of memory cells, and a memory controller that performs address mapping to replace a bad page of the memory block with a normal page of the memory block.Type: GrantFiled: March 5, 2013Date of Patent: October 13, 2015Assignee: Samsung Electronics Co. Ltd.Inventors: Joonho Lee, Jong-Nam Baek, Dong-Hoon Ham, Sang-Wook Yoo, Intae Hwang
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Publication number: 20140226404Abstract: A memory system, comprising a flash memory comprising multiple memory blocks, and a controller configured to erase each of the memory blocks using multiple steps. The controller stores, for each of the memory blocks, metadata indicating which of the multiple steps have been completed, and erases each of the memory blocks based on the stored metadata.Type: ApplicationFiled: February 5, 2014Publication date: August 14, 2014Inventors: JOON-HO LEE, JONG-NAM BAEK, DONG-HOON HAM, SANG-WOOK YOO, IN-TAE HWANG
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Publication number: 20140204672Abstract: A memory system includes a flash memory including a block having first sub-blocks and second sub-blocks different from each other, the second sub-blocks including free pages only; and a controller configured to erase the flash memory in units of the sub-blocks, and in a garbage collection operation, the controller is configured to copy data of a valid page of the first sub-blocks to at least one of the second sub-blocks.Type: ApplicationFiled: January 15, 2014Publication date: July 24, 2014Inventors: Joon-Ho Lee, Jong-Nam Baek, Dong-Hoon Ham, Sang-Wook Yoo, In-Tae Hwang
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Publication number: 20130326119Abstract: Disclosed is a method of writing data in a storage device including a nonvolatile memory device. The method includes receiving write data with a write request, detecting a number of free blocks, if the detected number of free blocks is less than a threshold value, allocating a log block only in accordance with a sub-block unit, but if the detected number of free blocks is not less than the threshold value, allocating the log block in accordance with one of the sub-block unit and a physical block unit, wherein the sub-block unit is smaller than the physical block unit.Type: ApplicationFiled: March 6, 2013Publication date: December 5, 2013Inventors: JOONHO LEE, JONG-NAM BAEK, DONG-HOON HAM, SANG-WOOK YOO, INTAE HWANG
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Publication number: 20130326312Abstract: Disclosed is a storage device which includes a nonvolatile memory device including a memory block a program order of which is adjusted regardless of an arrangement of memory cells, and a memory controller that performs address mapping to replace a bad page of the memory block with a normal page of the memory block.Type: ApplicationFiled: March 5, 2013Publication date: December 5, 2013Inventors: JOONHO LEE, JONG-NAM BAEK, DONG-HOON HAM, SANG-WOOK YOO, INTAE HWANG
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Patent number: 7617381Abstract: A demand paging apparatus and a method for an embedded system are provided. The demand paging apparatus includes a nonvolatile storage device, a physical memory, a demand paging window, and a demand paging manager. The nonvolatile storage device stores code and data which are handled by demand paging. The physical memory processes information about a requested page that is read from the nonvolatile storage device. The demand paging window generates a fault for the page and, thus, causes demand paging to occur. The demand paging window is part of an address space to which an application program stored in the nonvolatile storage device refers. The demand paging manager processes the page fault generated in the demand paging window.Type: GrantFiled: November 22, 2006Date of Patent: November 10, 2009Inventors: Hyo-jun Kim, Ji-hyun In, Dong-hoon Ham
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Publication number: 20070150695Abstract: A demand paging apparatus and a method for an embedded system are provided. The demand paging apparatus includes a nonvolatile storage device, a physical memory, a demand paging window, and a demand paging manager. The nonvolatile storage device stores code and data which are handled by demand paging. The physical memory processes information about a requested page that is read from the nonvolatile storage device. The demand paging window generates a fault for the page and, thus, causes demand paging to occur. The demand paging window is part of an address space to which an application program stored in the nonvolatile storage device refers. The demand paging manager processes the page fault generated in the demand paging window.Type: ApplicationFiled: November 22, 2006Publication date: June 28, 2007Inventors: Hyo-jun Kim, Ji-hyun In, Dong-hoon Ham