Patents by Inventor Dong Hoon Hwang

Dong Hoon Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145560
    Abstract: A semiconductor device includes an active pattern on a substrate extending in a first horizontal direction, a gate electrode on the active pattern extending in a second horizontal direction, a source/drain region on the active pattern, an upper source/drain region apart from the lower source/drain region, a lower source/drain between upper and lower source/drain regions and connected to the lower source/drain region, an upper source/drain connected to an upper source/drain region, an interlayer insulating layer surrounding the upper source/drain region, a through-via on opposing sidewalls in the second horizontal direction extending through the interlayer insulating layer in the vertical direction, the through-via being spaced from the upper source/drain region and upper source/drain contact in the second horizontal direction, the through-via being connected to the lower source/drain contact, and a dam structure on each of the opposing sidewalls in the horizontal direction of the upper source/drain region.
    Type: Application
    Filed: June 20, 2023
    Publication date: May 2, 2024
    Inventors: Dong Hoon HWANG, Myung Il KANG, Do Young CHOI
  • Publication number: 20240145369
    Abstract: In one example, an electronic device comprises a substrate comprising a conductive structure and a dielectric structure, the dielectric structure comprising an upper dielectric layer, an electronic component over a top side of the substrate and coupled with the conductive structure, an encapsulant over the top side of the substrate and adjacent a lateral side of the electronic component, and a shield over the top side of the electronic component and contacting a lateral side of the encapsulant and a first lateral side of the substrate. The conductive structure comprises a first tab structure at the first lateral side of the substrate, and wherein the first tab structure contacts the shield and extends above the upper dielectric layer. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: October 28, 2022
    Publication date: May 2, 2024
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Soo Hyun Kim, Won Myoung Ki, Dong Hoon Han, Tae Kyeong Hwang
  • Publication number: 20240120400
    Abstract: A semiconductor device includes first lower nanosheets; an upper isolation layer on the first lower nanosheets; first upper nanosheets on the upper isolation layer; a first upper source/drain region on the first upper nanosheets; a second upper source/drain region on the first upper nanosheets; a first gate electrode surrounding the first lower nanosheets, the upper isolation layer, and the first upper nanosheets; a first gate cut on a side of the first gate electrode and extending from a lower surface of the first gate electrode to an upper surface of the first gate electrode; a first through via inside the first gate cut and insulated from the first gate electrode; a first upper source/drain contact on and electrically connected to the first upper source/drain region; and a second upper source/drain contact on the first upper source/drain region and electrically connecting the second upper source/drain region with the first through via.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Dong Hoon HWANG, In Chan HWANG, Hyo Jin KIM
  • Patent number: 11932315
    Abstract: A freight vehicle on which a drone is docked, may include: a transfer device provided in the vehicle and configured to move up and down between an internal space of the vehicle and a roof to receive freight from the drone through the roof of the vehicle or transfer freight to the drone; and a loadspace separated, as a portion of the internal space of the vehicle, from a space where the transfer device is provided and including an open portion formed on a side or a rear of the vehicle, and onto which the freight is loaded.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: March 19, 2024
    Assignees: Hyundai Motor Company, Kia Corporation, Yong San Co., Ltd.
    Inventors: Jin Ho Hwang, Sang Heon Lee, Dong Eun Cha, Choon Taik Kim, Sang Hoon Lee, Hong Kwon Moon
  • Patent number: 11932140
    Abstract: Disclosed is a cushion tip-up type seat for a vehicle. The cushion tip-up type seat for a vehicle is configured to perform a tip-up function of a cushion part, and to move a seat leftward and rightward to adjust an interval between left and right seats, whereby left and right spacing between occupants seated in the seats is sufficiently secured and the convenience of the occupants is improved.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: March 19, 2024
    Assignees: Hyundai Motor Company, Kia Corporation, Hyundai Transys Inc.
    Inventors: Dong Woo Jeong, Eun Sue Kim, Dae Hee Lee, Myung Hoe Kim, Jun Sik Hwang, Gwon Hwa Bok, Hae Dong Kwak, Jae Sung Shin, Han Kyung Park, Jae Hoon Cho
  • Publication number: 20240079748
    Abstract: In some implementations, is provided a battery cell, and battery module and battery pack including the same including: an electrode assembly in which a plurality of polar plates are stacked; a case having an internal space in which the electrode assembly is accommodated; a cap assembly coupled to the case and having a terminal disposed therein; and a connection pin configured to electrically connect the electrode assembly and the terminal, wherein the terminal includes: a rivet having an insertion hole into which the connection pin is inserted; and a terminal portion coupled to the rivet.
    Type: Application
    Filed: August 22, 2023
    Publication date: March 7, 2024
    Inventors: Jae Sik SHIN, Seung Hoon JU, Jae Gyu BYUN, Gi Jeong SEO, Dong Ha HWANG
  • Patent number: 11912674
    Abstract: The present invention provides methods for treating or ameliorating metabolic diseases, cholestatic liver diseases, or organ fibrosis, which comprises administering to a subject a therapeutically effective amount of a pharmaceutical composition comprising an isoxazole derivative, a racemate, an enantiomer, or a diastereoisomer thereof, or a pharmaceutically acceptable salt of the derivative, the racemate, the enantiomer, or the diastereoisomer.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: February 27, 2024
    Assignee: IL DONG PHARMACEUTICAL CO., LTD.
    Inventors: Jae-Hoon Kang, Hong-Sub Lee, Yoon-Suk Lee, Jin-Ah Jeong, Sung-Wook Kwon, Jeong-Guen Kim, Kyung-Sun Kim, Dong-Keun Song, Sun-Young Park, Kyeo-Jin Kim, Ji-Hye Choi, Hey-Min Hwang
  • Publication number: 20240047463
    Abstract: In some embodiments, a semiconductor device includes a first active pattern extended in a first horizontal direction on a substrate, a second active pattern extended in the first horizontal direction on the substrate, a first bottom gate electrode extended in a second horizontal direction on the first active pattern, a first upper gate electrode extended in the second horizontal direction on the first bottom gate electrode, a second bottom gate electrode extended in the second horizontal direction on the second active pattern, a second upper gate electrode extended in the second horizontal direction on the second bottom gate electrode, and a first gate cut comprising a first portion isolating the first bottom gate electrode from the second bottom gate electrode and a second portion isolating the first upper gate electrode from the second upper gate electrode. A width of the second portion exceeds a width of the first portion.
    Type: Application
    Filed: April 6, 2023
    Publication date: February 8, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong Hoon HWANG, Seung Min SONG, Min Chan GWAK
  • Publication number: 20240047521
    Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 8, 2024
    Inventors: Min-Chul SUN, Dae Won HA, Dong Hoon HWANG, Jong Hwa BAEK, Jong Min JEON, Seung Mo HA, Kwang Yong YANG, Jae Young PARK, Young Su CHUNG
  • Patent number: 11830911
    Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.
    Type: Grant
    Filed: February 1, 2023
    Date of Patent: November 28, 2023
    Inventors: Min-Chul Sun, Dae Won Ha, Dong Hoon Hwang, Jong Hwa Baek, Jong Min Jeon, Seung Mo Ha, Kwang Yong Yang, Jae Young Park, Young Su Chung
  • Publication number: 20230178595
    Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.
    Type: Application
    Filed: February 1, 2023
    Publication date: June 8, 2023
    Inventors: Min-Chul Sun, Dae Won Ha, Dong Hoon Hwang, Jong Hwa Baek, Jong Min Jeon, Seung Mo Ha, Kwang Yong Yang, Jae Young Park, Young Su Chung
  • Patent number: 11575002
    Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: February 7, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min-Chul Sun, Dae Won Ha, Dong Hoon Hwang, Jong Hwa Baek, Jong Min Jeon, Seung Mo Ha, Kwang Yong Yang, Jae Young Park, Young Su Chung
  • Publication number: 20210233995
    Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.
    Type: Application
    Filed: March 25, 2021
    Publication date: July 29, 2021
    Inventors: Min-Chul SUN, Dae Won HA, Dong Hoon HWANG, Jong Hwa BAEK, Jong Min JEON, Seung Mo HA, Kwang Yong YANG, Jae Young PARK, Young Su CHUNG
  • Patent number: 10964782
    Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: March 30, 2021
    Inventors: Min-Chul Sun, Dae Won Ha, Dong Hoon Hwang, Jong Hwa Baek, Jong Min Jeon, Seung Mo Ha, Kwang Yong Yang, Jae Young Park, Young Su Chung
  • Publication number: 20200119143
    Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.
    Type: Application
    Filed: December 16, 2019
    Publication date: April 16, 2020
    Inventors: Min-Chul SUN, Dae Won HA, Dong Hoon HWANG, Jong Hwa BAEK, Jong Min JEON, Seung Mo HA, Kwang Yong YANG, Jae Young PARK, Young Su CHUNG
  • Patent number: 10529801
    Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: January 7, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min-Chul Sun, Dae Won Ha, Dong Hoon Hwang, Jong Hwa Baek, Jong Min Jeon, Seung Mo Ha, Kwang Yong Yang, Jae Young Park, Young Su Chung
  • Publication number: 20190096993
    Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.
    Type: Application
    Filed: March 23, 2018
    Publication date: March 28, 2019
    Inventors: Min-Chul Sun, Dae Won Ha, Dong Hoon Hwang, Jong Hwa Baek, Jong Min Jeon, Seung Mo Ha, Kwang Yong Yang, Jae Young Park, Young Su Chung
  • Patent number: 10014300
    Abstract: An integrated circuit device as provided herein may include a device region and an inter-device isolation region. Within the device region, a fin-type active region may protrude from a substrate, and opposite sidewalls of the fin-type active region may be covered by an inner isolation layer. An outer isolation layer may fill an outer deep trench in the inter-device isolation region. The inner isolation layer may extend away from the device region at an inner sidewall of the outer deep trench and into the inter-device isolation region. There may be multiple fin-type active regions, and trenches therebetween. The outer deep trench and the trenches between the plurality of fin-type active regions may be of different heights. The integrated circuit device and methods of manufacturing described herein may reduce a possibility that various defects or failures may occur due to an unnecessary fin-type active region remaining around the device region.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: July 3, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mirco Cantoro, Tae-yong Kwon, Jae-young Park, Dong-hoon Hwang, Han-ki Lee, So-ra You
  • Publication number: 20170317084
    Abstract: An integrated circuit device as provided herein may include a device region and an inter-device isolation region. Within the device region, a fin-type active region may protrude from a substrate, and opposite sidewalls of the fin-type active region may be covered by an inner isolation layer. An outer isolation layer may fill an outer deep trench in the inter-device isolation region. The inner isolation layer may extend away from the device region at an inner sidewall of the outer deep trench and into the inter-device isolation region. There may be multiple fin-type active regions, and trenches therebetween. The outer deep trench and the trenches between the plurality of fin-type active regions may be of different heights. The integrated circuit device and methods of manufacturing described herein may reduce a possibility that various defects or failures may occur due to an unnecessary fin-type active region remaining around the device region.
    Type: Application
    Filed: April 6, 2017
    Publication date: November 2, 2017
    Inventors: Mirco Cantoro, Tae-yong Kwon, Jae-young Park, Dong-hoon Hwang, Han-ki Lee, So-ra You
  • Patent number: 9397229
    Abstract: A nano resonance apparatus includes a gate electrode configured to generate a magnetic field, and a nanowire connecting a source electrode to a drain electrode and configured to vibrate in the presence of the magnetic field. The nanowire includes a protruding portion extending in a direction of the gate electrode.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: July 19, 2016
    Assignees: Samsung Electronics Co., Ltd., Korea University Industrial & Academic Collaboration Foundation
    Inventors: In Sang Song, Ho Soo Park, Duck Hwan Kim, Sang Uk Son, Jae Shik Shin, Jae-Sung Rieh, Byeong Kwon Ju, Dong Hoon Hwang