Abstract: When it is determined that a first super memory block among a plurality of super memory blocks satisfies an exchange condition, the storage device may exchange a first memory unit in the first super memory block with a second memory unit included in a second super memory block among the plurality of super memory blocks. In this case, the first memory unit is a bad memory unit and the second memory unit is a normal memory unit.

Abstract: The present technology relates to an electronic device. According to the present technology, a memory controller may include a garbage collection controller and a sustain detector. The garbage collection controller may generate garbage collection information including valid page count values of victim memory blocks on which garbage collection is to be performed among a plurality of memory blocks included in a memory device. The sustain detector in communication with the garbage collection controller may generate sustain information indicating whether random write performance for the memory device is in a sustain state in which a random write performance value related to a capability of the random write performance is greater than or equal to a threshold value based on the garbage collection information.

Abstract: A memory system comprising: a plurality of memory devices; a buffer memory suitable for buffering write data inputted from a host; and a controller suitable for: classifying the write data buffered in the buffer memory into N data groups according to logical addresses corresponding to the write data, N being a natural number greater than or equal to 2, selecting at least one data group among the N data groups when a size difference between at least two of the N data groups is equal to or more than a set size, and flushing at least one piece of data of the selected data group to at least one of the plurality of memory devices.

Abstract: A memory system comprising: a plurality of memory devices; a buffer memory suitable for buffering write data inputted from a host; and a controller suitable for: classifying the write data buffered in the buffer memory into N data groups according to logical addresses corresponding to the write data, N being a natural number greater than or equal to 2, selecting at least one data group among the N data groups when a size difference between at least two of the N data groups is equal to or more than a set size, and flushing at least one piece of data of the selected data group to at least one of the plurality of memory devices.