Patents by Inventor Dong Hyo LEE

Dong Hyo LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240097218
    Abstract: Methods and systems for executing tracking and monitoring manufacturing data of a battery are disclosed. One method includes: receiving, by a server system, sensing data of the battery from a sensing system; generating, by the server system, mapping data based on the sensing data; generating, by the server system, identification data of the battery based on the sensing data; generating, by the server system, monitoring data of the battery based on the sensing data, the identification data, and the mapping data; and generating, by the server system, display data for displaying a simulated electrode of the battery on a graphical user interface based on the monitoring data of the battery.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 21, 2024
    Inventors: Min Kyu Sim, Jong Seok Park, Min Su Kim, Jae Hwan Lee, Ki Deok Han, Eun Ji Jo, Su Wan Park, Gi Yeong Jeon, June Hee Kim, Wi Dae Park, Dong Min Seo, Seol Hee Kim, Dong Yeop Lee, Jun Hyo Su, Byoung Eun Han, Seung Huh
  • Publication number: 20240089754
    Abstract: Embodiments of the present disclosure provide an active terminal detection method and an active terminal detection device that increase the performance of determining whether a terminal is active by designing a spread code to reduce a cross-correlation value of the spread code of a terminal with a high activation frequency in a massive machine-type communication environment by using deep learning.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Applicant: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Nam Ik KIM, Kwang Bok LEE, Byong Hyo SHIM, Dong Woo KIM
  • Patent number: 11921080
    Abstract: The gas sensor according to an exemplary embodiment of the present invention comprises: an FET device including one or more gate electrodes; a sensor array part including a plurality of sensors, in which a first electrode of each sensor is connected to at least one gate electrode of the plurality of gate electrodes in the FET device; and a controller detecting a gas using a current between a drain-source in response to voltage changes in the gate electrode of the FET device, wherein each sensor includes: a first electrode connected to a gate electrode of the FET device; a second electrode receiving an operating voltage through a switch controlled by the controller; and a detection film interposed between the first electrode and the second electrode.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: March 5, 2024
    Assignee: KOREA ELECTRONICS TECHNOLOGY INSTITUTE
    Inventors: Kook Nyung Lee, Woo Kyeong Seong, Won Hyo Kim, Dong Ki Hong, Hye Lim Kang
  • Patent number: 10649139
    Abstract: An optical waveguide structure includes a substrate and a core structure disposed on the substrate. The substrate includes a first waveguide region, a second waveguide region, and a transition region between the first waveguide region and the second waveguide region. The core structure includes first core segments arranged in a first direction and a second direction crossing the first direction on the transition region. The core structure includes second core segments arranged in the first direction and the second direction on the second waveguide region. The first direction and the second direction are parallel to a top surface of the substrate.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: May 12, 2020
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Duk Jun Kim, Young-Ho Ko, Dong-Young Kim, Jong-Hoi Kim, Yongsoon Baek, Jung-Ho Song, Dong Hyo Lee, Byung-Seok Choi, Won Seok Han
  • Publication number: 20190219760
    Abstract: An optical waveguide structure includes a substrate and a core structure disposed on the substrate. The substrate includes a first waveguide region, a second waveguide region, and a transition region between the first waveguide region and the second waveguide region. The core structure includes first core segments arranged in a first direction and a second direction crossing the first direction on the transition region. The core structure includes second core segments arranged in the first direction and the second direction on the second waveguide region. The first direction and the second direction are parallel to a top surface of the substrate.
    Type: Application
    Filed: December 10, 2018
    Publication date: July 18, 2019
    Inventors: Duk Jun KIM, Young-Ho KO, Dong-Young KIM, Jong-Hoi KIM, Yongsoon BAEK, Jung-Ho SONG, Dong Hyo LEE, Byung-Seok CHOI, Won Seok HAN
  • Patent number: 10146071
    Abstract: Provided is an optical transmitter module. The optical transmitter module includes a substrate, a ground layer disposed on the substrate, an electro-absorption modulated laser (EML) chip disposed on the ground layer to generate an modulated optical signal, a ground structure disposed on the EML chip and electrically connected to the ground layer, a matching resistor disposed on the ground structure, and a first bonding wire disposed between the EML chip and the matching resistor to electrically connect the EML chip to the matching resistor.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: December 4, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Young-Tak Han, Sang Ho Park, Yongsoon Baek, Jang Uk Shin, Dong Hyo Lee, Dong-Hun Lee
  • Publication number: 20180143463
    Abstract: Provided is an optical transmitter module. The optical transmitter module includes a substrate, a ground layer disposed on the substrate, an electro-absorption modulated laser (EML) chip disposed on the ground layer to generate an modulated optical signal, a ground structure disposed on the EML chip and electrically connected to the ground layer, a matching resistor disposed on the ground structure, and a first bonding wire disposed between the EML chip and the matching resistor to electrically connect the EML chip to the matching resistor.
    Type: Application
    Filed: May 16, 2017
    Publication date: May 24, 2018
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Young-Tak HAN, Sang Ho PARK, Yongsoon BAEK, Jang Uk SHIN, Dong Hyo LEE, Dong-Hun LEE