Abstract: The present disclosure relates to a non-transitory storage medium for storing program code and a method of executing an artificial intelligence (AI) pipeline non-fungible token (NFT). The program code is executed by a hardware processor to mint a blockchain-based NFT including ownership information of the AI pipeline, request an execution of the program code performing a predetermined function in an event node executing the AI pipeline according to a request of execution of an NFT owner, connect to at least one worker node to execute a target AI pipeline of the NFT, receive an execution result value of the worker node to record a proof-of-work for the execution result value in the event node, and collect the execution result value of the worker node on which the proof-of-work is performed is performed to change a blockchain state.

Abstract: A braking control apparatus includes a first controller that brakes a vehicle depending on an output signal generated by a first pedal stroke sensor according to a stroke of a brake pedal, a second controller that brakes the vehicle depending on an output signal generated by a second pedal stroke sensor, a third controller that calculates a regenerative brake torque for regenerative braking of the vehicle and brakes the vehicle, and an electric parking brake (EPB) that generates a parking braking force of the vehicle. Any one of the first controller, the second controller, or the third controller controls the regenerative braking or the parking braking force to brake the vehicle, depending on whether at least one of the first controller or the second controller is in a normal state.

Abstract: Disclosed herein are a microorganism with excellent deacetoxycephalosporin C (DAOC) productivity and a use thereof. A mutant microorganism with improved DAOC productivity and a use thereof for producing 7-aminodeacetoxycephalosporanic acid (7-ADCA) are provided.

Abstract: A slew rate adjusting circuit includes an adjustment transistor configured to provide an adjustment current into an output port of an arithmetic amplifier, a first transistor connected between a power line of the arithmetic amplifier and the adjustment transistor, and a second transistor connected between the first transistor and an output node of the output port, wherein the adjustment transistor is turned on by the second transistor in response to a difference between an input voltage and an output voltage being equal to or greater than a reference voltage, and the adjustment current is provided to the output port in response to the adjustment transistor being turned on.

Abstract: A slew rate adjusting circuit includes an adjustment transistor configured to provide an adjustment current into an output port of an arithmetic amplifier, a first transistor connected between a power line of the arithmetic amplifier and the adjustment transistor, and a second transistor connected between the first transistor and an output node of the output port, wherein the adjustment transistor is turned on by the second transistor in response to a difference between an input voltage and an output voltage being equal to or greater than a reference voltage, and the adjustment current is provided to the output port in response to the adjustment transistor being turned on.

Abstract: A slew rate adjusting circuit includes an adjustment transistor configured to provide an adjustment current into an output port of an arithmetic amplifier, a first transistor connected between a power line of the arithmetic amplifier and the adjustment transistor, and a second transistor connected between the first transistor and an output node of the output port, wherein the adjustment transistor is turned on by the second transistor in response to a difference between an input voltage and an output voltage being equal to or greater than a reference voltage, and the adjustment current is provided to the output port in response to the adjustment transistor being turned on.

Abstract: A network infrastructure system implements data sharing and processing by using a network infrastructure to which an application terminal or application server constituting an application domain is connected in a shared manner, includes a plurality of network infrastructure nodes storing, processing, sharing data, wherein each of the plurality of network infrastructure nodes includes a data processing module including a data transfer function, a data distribution function, a data processing function, and a data sharing function which are provided to at least one of the application terminal and the application server.

Abstract: The present disclosure provides a blockchain-based serverless computing system including a blockchain server configured to store and manage a database including a plurality of block states updated according to at least one transaction received from a client, a state listener configured to monitor whether or not the plurality of block states are changed, and a worker configured to execute a function according to the change of the plurality of block states, the state listener detects the change of the plurality of block states and notifies the worker of a function execution according to the change of the block states, and the worker executes the function according to the notification of the function execution. In addition, a transaction indicating the execution result of the functions by worker can be recorded on the blockchain network.

Abstract: A slew rate adjusting circuit includes an adjustment transistor configured to provide an adjustment current into an output port of an arithmetic amplifier, a first transistor connected between a power line of the arithmetic amplifier and the adjustment transistor, and a second transistor connected between the first transistor and an output node of the output port, wherein the adjustment transistor is turned on by the second transistor in response to a difference between an input voltage and an output voltage being equal to or greater than a reference voltage, and the adjustment current is provided to the output port in response to the adjustment transistor being turned on.

Abstract: A network infrastructure system implements data sharing and processing by using a network infrastructure to which an application terminal or application server constituting an application domain is connected in a shared manner, includes a plurality of network infrastructure nodes storing, processing, sharing data, wherein each of the plurality of network infrastructure nodes includes a data processing module including a data transfer function, a data distribution function, a data processing function, and a data sharing function which are provided to at least one of the application terminal and the application server.

Abstract: A fingerprint detection device including a sensor array including a plurality of fingerprint sensor elements arranged in a form of a matrix having a plurality of rows and columns, a filter and buffer unit including a plurality of first banks, each of which is configured to perform a noise elimination operation and a temporal storage operation in parallel with respect to output signals of some different columns of the sensor array. Each of the plurality of first banks simultaneously or consecutively acquires output signals from the fingerprint sensor elements belonging to columns spaced apart from each other by a predetermined distance. A sample and hold unit including second banks, the number of which being the same as the number of the plurality of first banks, performs a sampling and hold function in parallel in response to output signals from the plurality of first banks. An input/output unit receives an output signal from the sample and hold unit to output data of the sensor array.

Abstract: A display panel includes a timing controller embedded data driver and a first data driver. The timing controller embedded data driver includes an image processing part and an internal data driving part. The image processing part generates a first data signal corresponding to a first display area and a second data signal corresponding to a second display area based on input image data. The internal data driving part generates a second data voltage based on the second data signal to output the second data voltage to the second display area. The first data driver is disposed at a first side of the timing controller embedded data driver. The first data driver receives the first data signal from the timing controller embedded data driver and generates a first data voltage based on the first data signal to output the first data voltage to the first display area.

Abstract: A display panel includes a timing controller embedded data driver and a first data driver. The timing controller embedded data driver includes an image processing part and an internal data driving part. The image processing part generates a first data signal corresponding to a first display area and a second data signal corresponding to a second display area based on input image data. The internal data driving part generates a second data voltage based on the second data signal to output the second data voltage to the second display area. The first data driver is disposed at a first side of the timing controller embedded data driver. The first data driver receives the first data signal from the timing controller embedded data driver and generates a first data voltage based on the first data signal to output the first data voltage to the first display area.

Abstract: A display panel includes a timing controller embedded data driver and a first data driver. The timing controller embedded data driver includes an image processing part and an internal data driving part. The image processing part generates a first data signal corresponding to a first display area and a second data signal corresponding to a second display area based on input image data. The internal data driving part generates a second data voltage based on the second data signal to output the second data voltage to the second display area. The first data driver is disposed at a first side of the timing controller embedded data driver. The first data driver receives the first data signal from the timing controller embedded data driver and generates a first data voltage based on the first data signal to output the first data voltage to the first display area.

Abstract: A liquid crystal display comprising: a substrate; a plurality of common voltage lines disposed on the substrate; an insulating layer disposed on the common voltage lines; and a common electrode and a plurality of pixel electrodes disposed on the insulating layer, the plurality of pixel electrodes constituting a plurality of pixel electrodes, respectively, wherein the insulating layer comprises a plurality of contact holes to expose at least part of the common voltage lines, and wherein two adjacent contact holes among the plurality of contact holes are spaced apart by at least one pixel therebetween.

Abstract: A method for generating smart contents includes contents protected by a digital right management (DRM) technology; and metadata including information necessary to use the contents. Further, the method includes a smart code for protecting copyright of the contents and position information which the smart code is downloaded.

Abstract: An authentication apparatus for detecting and preventing a source address spoofing packet, includes a packet reception unit configured to receive a packet from a previous node or a user host; a self-assurance type ID generation unit configured to generate a self-assurance type ID of a source node of the received packet; and a self-assurance type ID verification unit configured to determine whether the source address of the received packet has been spoofed. Further, the authentication apparatus includes a white list storage unit configured to store a reliable source node; a black list storage unit configured to store an unreliable source node; and a packet transmission unit configured to transmit the packet whose source has been verified through the self-assurance type ID verification unit to a next network node.

Abstract: A liquid crystal display comprising: a substrate; a plurality of common voltage lines disposed on the substrate; an insulating layer disposed on the common voltage lines; and a common electrode and a plurality of pixel electrodes disposed on the insulating layer, the plurality of pixel electrodes constituting a plurality of pixel electrodes, respectively, wherein the insulating layer comprises a plurality of contact holes to expose at least part of the common voltage lines, and wherein two adjacent contact holes among the plurality of contact holes are spaced apart by at least one pixel therebetween.

Abstract: The present invention relates to an agent apparatus and method for sharing anonymous identifier-based security information among security management domains. A plurality of security information sharing agent apparatuses respectively located in a plurality of security management domains and configured to collect security information and transmit collected security information to outside of the security management domains.

Abstract: An authentication apparatus for a non-real-time IPTV system decrypts a first encrypted value included in a contents request message received from a device using a preset session key, and then verifies the validity of the contents request message. If the verification results of the contents request message are valid, the authentication apparatus encrypts a variation between timestamps of the authentication apparatus and the device using the session key, and then generates a second encrypted value. After verification information by which the device is capable of verifying the authentication apparatus has been generated using the second encrypted value, the authentication apparatus sends verification information, together with contents corresponding to the contents request message, to the device.