Patents by Inventor Dong Ji

Dong Ji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12412744
    Abstract: In certain examples, methods and semiconductor structures are directed to use of a doped buried region (e.g., Mg-dopant) including a III-Nitride material and having a diffusion path (“ion diffusion path”) that includes hydrogen introduced by using ion implantation via at least one ion species. An ion implantation thermal treatment causes hydrogen to diffuse through the ion implanted path and causes activation of the buried region. In more specific examples in which such semiconductor structures have an ohmic contact region at which a source of a transistor interfaces with the buried region, the ohmic contact region is without etching-based damage due at least in part to the post-ion implantation thermal treatment.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: September 9, 2025
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Srabanti Chowdhury, Dong Ji
  • Patent number: 12148802
    Abstract: A driver circuit for a three-dimensional (3D) memory device has a field management structure electrically coupled to a gate conductor. The field management structure causes an electric field peak in a vertical channel of the 3D memory device when a voltage differential exists between the source conductor and the drain conductor and the gate conductor is not biased. The electrical field peak can adjust the electrical response of the driver circuit, enabling the circuit to have a higher breakdown threshold voltage and improved drive current. Thus, the driver circuit can enable a scalable vertical string driver that is above the memory array instead of under the memory array circuitry.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: November 19, 2024
    Assignee: Intel NDTM US LLC
    Inventors: Dong Ji, Guangyu Huang, Deepak Thimmegowda
  • Publication number: 20240342169
    Abstract: Embodiments of the present application provide Ensartinib or a salt thereof and a use of a composition containing Ensartinib or the salt thereof in treatment of a disease carrying MET 14 exon skipping mutation.
    Type: Application
    Filed: August 4, 2022
    Publication date: October 17, 2024
    Applicant: BETTA PHARMACEUTICALS CO., LTD
    Inventors: Lijia LIU, Jing GUO, Yu WANG, Xiangdong ZHAO, Jie CHEN, Yang WANG, Xiaobin YUAN, Dong JI, Licheng KONG, Lieming DING
  • Patent number: 12089412
    Abstract: A driver circuit for a three-dimensional (3D) memory device has a super junction structure as a field management structure. The super junction structure could be referred to as an extended junction structure, which distributes the electrical field of the junction between the vertical channel and the gate conductor for a string driver. The vertical channel includes a channel conductor to connect vertically between a source conductor and a drain conductor. The extended junction structure extends in parallel with the vertical channel conductor, extending vertically toward the drain conductor, having a height greater than a height of the gate conductor.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: September 10, 2024
    Assignee: INTEL NDTM US LLC
    Inventors: Dong Ji, Guangyu Huang, Deepak Thimmegowda
  • Patent number: 12020319
    Abstract: Systems, methods, and apparatuses for automatically detecting the risk of dealer default are described. A machine learning model may be trained using a gradient boosting technique on a dataset that includes historical lien information, historical dealer information, and historical vehicle default information. Lien information and financing information for vehicles may be received and correlated. Furthermore, a machine learning model may generate aggregate risk scores for dealers. Furthermore, determination of an aggregate risk score that exceeds a threshold risk score may cause the generation of a notification.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: June 25, 2024
    Assignee: Capital One Services, LLC
    Inventors: Pedro Partiti De Oliveira, Marrian Kitchens, Papa D. Ndiaye, Joseph T. Allison, Collin Longmire, John Runge, Dong Ji, Abhishek Tewari, Bing Liu
  • Patent number: 12013770
    Abstract: In product testing, a script prioritization tool (102) is used to intelligently prioritize the execution sequence of test scripts. This tool creates a repository of test outputs from the executions of test scripts and analyzes the outputs to train and deploy a machine learning, ML, model that defines the priority of the scripts that may need to be executed and the scripts whose execution may be skipped without affecting the quality of testing. Scripts that are more likely to fail and/or are time consuming to execute are prioritized, while other scripts may be skipped. The ML model ranks the scripts based on the average execution time of the script, a count of the execution failures of the script, a count of the number of execution retries for the script, and the most recent failure time of the script. The scripts can be executed based on their rankings for efficiency and time-saving.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: June 18, 2024
    Assignee: Dell Products L.P.
    Inventors: Shibi Panikkar, Shanir Anshul, Sudeshna Dash, Tuck Meng Chin, Dong Ji
  • Publication number: 20230260018
    Abstract: Systems, methods, and apparatuses for automatically detecting the risk of dealer default are described. A machine learning model may be trained using a gradient boosting technique on a dataset that includes historical lien information, historical dealer information, and historical vehicle default information. Lien information and financing information for vehicles may be received and correlated. Furthermore, a machine learning model may generate aggregate risk scores for dealers. Furthermore, determination of an aggregate risk score that exceeds a threshold risk score may cause the generation of a notification.
    Type: Application
    Filed: June 27, 2022
    Publication date: August 17, 2023
    Inventors: Pedro Partiti De Oliveira, Marrian Kitchens, Papa D. Ndiaye, Joseph T. Allison, Collin Longmire, John Runge, Dong Ji, Abhishek Tewari, Bing Liu
  • Publication number: 20230260019
    Abstract: Systems, methods, and apparatuses for automatically prioritizing unperfected liens are described. A machine learning model may be trained to detect a risk of dealer default. Lien information corresponding to liens for vehicles associated with dealers may be received. Prioritized lien information may be generated based on selection of the liens that satisfy criteria. Financing information for vehicles may be received and correlated with the prioritized lien information. Furthermore, the machine learning model may be used to generate risk scores associated with the liens. The liens may be prioritized based on the aggregate risk scores.
    Type: Application
    Filed: June 27, 2022
    Publication date: August 17, 2023
    Inventors: Pedro Partiti De Oliveira, Collin Longmire, Marrian Kitchens, Joseph T. Allison, Papa D. Ndiaye, John Runge, Dong Ji, Abhishek Tewari, Bing Liu
  • Publication number: 20220230883
    Abstract: In certain examples, methods and semiconductor structures are directed to use of a doped buried region (e.g., Mg-dopant) including a III-Nitride material and having a diffusion path (“ion diffusion path”) that includes hydrogen introduced by using ion implantation via at least one ion species. An ion implantation thermal treatment causes hydrogen to diffuse through the ion implanted path and causes activation of the buried region. In more specific examples in which such semiconductor structures have an ohmic contact region at which a source of a transistor interfaces with the buried region, the ohmic contact region is without etching-based damage due at least in part to the post-ion implantation thermal treatment.
    Type: Application
    Filed: May 15, 2020
    Publication date: July 21, 2022
    Inventors: Srabanti Chowdhury, Dong Ji
  • Publication number: 20220156168
    Abstract: In product testing, a script prioritization tool (102) is used to intelligently prioritize the execution sequence of test scripts. This tool creates a repository of test outputs from the executions of test scripts and analyzes the outputs to train and deploy a machine learning, ML, model that defines the priority of the scripts that may need to be executed and the scripts whose execution may be skipped without affecting the quality of testing. Scripts that are more likely to fail and/or are time consuming to execute are prioritized, while other scripts may be skipped. The ML model ranks the scripts based on the average execution time of the script, a count of the execution failures of the script, a count of the number of execution retries for the script, and the most recent failure time of the script. The scripts can be executed based on their rankings for efficiency and time-saving.
    Type: Application
    Filed: February 1, 2019
    Publication date: May 19, 2022
    Applicant: Dell Products L.P.
    Inventors: Shibi Panikkar, Shanir Anshul, Sudeshna Dash, Tuck Meng Chin, Dong Ji
  • Patent number: 11119877
    Abstract: A system for testing electrical components comprising a supplier test system operating on a first processor and configured to generate test data for a component and to store the component test data on a block chain. A board level test system operating on a second processor and configured to generate test data for a board and to store the board test data on the block chain. A test tracking system configured to request a first key to access to the component test data and a second key to access the board test data and to store the first key and the second key.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: September 14, 2021
    Assignee: Dell Products L.P.
    Inventors: Shanir Anshul, Shibi Panikkar, Xiang Cao, Dong Ji
  • Publication number: 20210081291
    Abstract: A system for testing electrical components comprising a supplier test system operating on a first processor and configured to generate test data for a component and to store the component test data on a block chain. A board level test system operating on a second processor and configured to generate test data for a board and to store the board test data on the block chain. A test tracking system configured to request a first key to access to the component test data and a second key to access the board test data and to store the first key and the second key.
    Type: Application
    Filed: September 16, 2019
    Publication date: March 18, 2021
    Applicant: DELL PRODUCTS L.P.
    Inventors: Shanir Anshul, Shibi Panikkar, Xiang Cao, Dong Ji
  • Patent number: 10801869
    Abstract: Provided are a flowrate measurement device and a flowrate measurement method. The flowrate measurement device includes an attachment portion configured to attach the flowrate measurement device to an object to be measured, and a measurement portion. The measurement portion includes a first ultrasonic transmitter, a second ultrasonic transmitter and a plurality of signal receivers between the first ultrasonic transmitter and the second ultrasonic transmitter. The plurality of signal receivers are spaced apart from each other. The first ultrasonic transmitter, the second ultrasonic transmitter and the plurality of the signal receivers are all disposed on the attachment portion, such that both the first ultrasonic transmitter and the second ultrasonic transmitter are capable of emitting an ultrasonic wave signal to the object to be measured. The signal receivers are capable of receiving an ultrasonic wave signal reflected from the object to be measured.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: October 13, 2020
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Dong Ji, Feng Luo, Nan Zhang, Guoliang Liu, Da Liu, Xiaodong Fang, Jialin Huang, Guoqiang Zhao, Jie Liu
  • Publication number: 20200227525
    Abstract: A driver circuit for a three-dimensional (3D) memory device has a field management structure electrically coupled to a gate conductor. The field management structure causes an electric field peak in a vertical channel of the 3D memory device when a voltage differential exists between the source conductor and the drain conductor and the gate conductor is not biased. The electrical field peak can adjust the electrical response of the driver circuit, enabling the circuit to have a higher breakdown threshold voltage and improved drive current. Thus, the driver circuit can enable a scalable vertical string driver that is above the memory array instead of under the memory array circuitry.
    Type: Application
    Filed: March 26, 2020
    Publication date: July 16, 2020
    Inventors: Dong JI, Guangyu HUANG, Deepak THIMMEGOWDA
  • Publication number: 20200227429
    Abstract: A driver circuit for a three-dimensional (3D) memory device has a super junction structure as a field management structure. The super junction structure could be referred to as an extended junction structure, which distributes the electrical field of the junction between the vertical channel and the gate conductor for a string driver. The vertical channel includes a channel conductor to connect vertically between a source conductor and a drain conductor. The extended junction structure extends in parallel with the vertical channel conductor, extending vertically toward the drain conductor, having a height greater than a height of the gate conductor.
    Type: Application
    Filed: March 26, 2020
    Publication date: July 16, 2020
    Inventors: Dong JI, Guangyu HUANG, Deepak THIMMEGOWDA
  • Publication number: 20190257680
    Abstract: Provided are a flowrate measurement device and a flowrate measurement method. The flowrate measurement device includes an attachment portion configured to attach the flowrate measurement device to an object to be measured, and a measurement portion. The measurement portion includes a first ultrasonic transmitter, a second ultrasonic transmitter and a plurality of signal receivers between the first ultrasonic transmitter and the second ultrasonic transmitter. The plurality of signal receivers are spaced apart from each other. The first ultrasonic transmitter, the second ultrasonic transmitter and the plurality of the signal receivers are all disposed on the attachment portion, such that both the first ultrasonic transmitter and the second ultrasonic transmitter are capable of emitting an ultrasonic wave signal to the object to be measured. The signal receivers are capable of receiving an ultrasonic wave signal reflected from the object to be measured.
    Type: Application
    Filed: April 10, 2018
    Publication date: August 22, 2019
    Applicants: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Dong JI, Feng LUO, Nan ZHANG, Guoliang LIU, Da LIU, Xiaodong FANG, Jialin HUANG, Guoqiang ZHAO, Jie LIU
  • Publication number: 20190115448
    Abstract: III-nitride vertical transistors and methods of making the same are disclosed. The transistors can include aperture regions that are formed using ion implantation. The resulting transistors can have improved properties.
    Type: Application
    Filed: May 11, 2017
    Publication date: April 18, 2019
    Applicant: The Regents of the University of California
    Inventors: Srabanti Chowdhury, Dong Ji
  • Patent number: 10259771
    Abstract: A preparation method of vegetable oil polyol, which is obtains by carrying out allylic oxidation treatment of vegetable oil, increasing the content of hydroxyl group in the product and then one step reaction between epoxidation and ring-opening. At the same time, the present invention also discloses novel vegetable oil polyol made by the preparation method and the application of the vegetable oil polyol in preparation of polyurethane foam material. Compared with the prior art, the method has the advantages of simple operation, low energy consumption and low side reaction occurrence rate.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: April 16, 2019
    Assignee: NANJING TECH UNIVERSITY
    Inventors: Kai Guo, Zheng Fang, Dong Ji, Junjie Tao, Xin Li, Li Wan, Ning Zhu, Kai Zhang, Pingkai Ouyang
  • Publication number: 20180222841
    Abstract: A preparation method of vegetable oil polyol, which is obtains by carrying out allylic oxidation treatment of vegetable oil, increasing the content of hydroxyl group in the product and then one step reaction between epoxidation and ring-opening. At the same time, the present invention also discloses novel vegetable oil polyol made by the preparation method and the application of the vegetable oil polyol in preparation of polyurethane foam material. Compared with the prior art, the method has the advantages of simple operation, low energy consumption and low side reaction occurrence rate.
    Type: Application
    Filed: January 28, 2016
    Publication date: August 9, 2018
    Inventors: Kai GUO, Zheng FANG, Dong JI, Junjie TAO, Xin LI, Li WAN, Ning ZHU, Kai ZHANG, Pingkai OUYANG
  • Patent number: D944515
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: March 1, 2022
    Inventor: Dong Ji