Patents by Inventor Dong-Jo Kang

Dong-Jo Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140353790
    Abstract: Provided is a semiconductor device having a backside illuminated image sensor and a method of forming same. The method includes providing a first substrate and a second substrate, forming metal interconnections on a first surface of the first substrate, forming a filling insulating layer filling spaces between sides of the metal interconnections and covering upper surfaces of the metal interconnections, forming a buffer insulating layer softer than the filling insulating layer on the filling insulating layer, forming a capping insulating layer denser than the buffer insulating layer on the buffer insulating layer, and bonding a surface of the capping insulating layer to a surface of the second substrate.
    Type: Application
    Filed: August 20, 2014
    Publication date: December 4, 2014
    Inventors: Dae-Keun Park, Dong-Jo Kang, Hyoung-Jun Kim, Jin-Sung Chung
  • Patent number: 8865508
    Abstract: Provided is a semiconductor device having a backside illuminated image sensor and a method of forming same. The method includes providing a first substrate and a second substrate, forming metal interconnections on a first surface of the first substrate, forming a filling insulating layer filling spaces between sides of the metal interconnections and covering upper surfaces of the metal interconnections, forming a buffer insulating layer softer than the filling insulating layer on the filling insulating layer, forming a capping insulating layer denser than the buffer insulating layer on the buffer insulating layer, and bonding a surface of the capping insulating layer to a surface of the second substrate.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: October 21, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Keun Park, Dong-Jo Kang, Hyoung-Jun Kim, Jin-Sung Chung
  • Publication number: 20140011316
    Abstract: Provided is a semiconductor device having a backside illuminated image sensor and a method of forming same. The method includes providing a first substrate and a second substrate, forming metal interconnections on a first surface of the first substrate, forming a filling insulating layer filling spaces between sides of the metal interconnections and covering upper surfaces of the metal interconnections, forming a buffer insulating layer softer than the filling insulating layer on the filling insulating layer, forming a capping insulating layer denser than the buffer insulating layer on the buffer insulating layer, and bonding a surface of the capping insulating layer to a surface of the second substrate.
    Type: Application
    Filed: April 12, 2013
    Publication date: January 9, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dae-Keun Park, Dong-Jo Kang, Hyoung-Jun Kim, Jin-Sung Chung
  • Patent number: 8232638
    Abstract: An interconnection structure having an oxygen trap pattern in a semiconductor device, and a method of fabricating the same are provided. The interconnection structure includes a lower interlayer insulating layer formed on a semiconductor substrate. A metal layer pattern and a capping layer pattern are sequentially stacked on the lower interlayer insulating layer. An oxygen trap pattern is disposed on the capping layer pattern and includes a conductive oxygen trap pattern.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: July 31, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Tae Ma, In-Sun Park, Dong-Jo Kang, Hyun-Seok Lim, Do-Hyung Kim
  • Publication number: 20090053538
    Abstract: An interconnection structure having an oxygen trap pattern in a semiconductor device, and a method of fabricating the same are provided. The interconnection structure includes a lower interlayer insulating layer formed on a semiconductor substrate. A metal layer pattern and a capping layer pattern are sequentially stacked on the lower interlayer insulating layer. An oxygen trap pattern is disposed on the capping layer pattern and includes a conductive oxygen trap pattern.
    Type: Application
    Filed: August 20, 2008
    Publication date: February 26, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Tae MA, In-Sun PARK, Dong-Jo KANG, Hyun-Seok LIM, Do-Hyung KIM
  • Patent number: 7479434
    Abstract: A semiconductor device includes a gate structure formed on a substrate. The gate structure includes an uppermost first metal silicide layer pattern having a first thickness. Spacers are formed on sidewalls of the gate structure. One or more impurity regions are formed in the substrate adjacent to at least one sidewall of the gate structure. A second metal silicide layer pattern, having a second thickness thinner than the first thickness, is formed on the one or more impurity regions.
    Type: Grant
    Filed: August 2, 2006
    Date of Patent: January 20, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Jo Kang, In-Sun Park, Dae-Joung Kim
  • Publication number: 20070029628
    Abstract: A semiconductor device includes a gate structure formed on a substrate. The gate structure includes an uppermost first metal silicide layer pattern having a first thickness. Spacers are formed on sidewalls of the gate structure. One or more impurity regions are formed in the substrate adjacent to at least one sidewall of the gate structure. A second metal silicide layer pattern, having a second thickness thinner than the first thickness, is formed on the one or more impurity regions.
    Type: Application
    Filed: August 2, 2006
    Publication date: February 8, 2007
    Inventors: Dong-Jo Kang, In-Sun Park, Dae-Joung Kim
  • Patent number: 6989338
    Abstract: Disclosed is a method for forming a multi-layered structure having at least two films on a semiconductor substrate. The substrate is disposed on a thermally conductible stage for supporting the substrate. After the distance between the stage and the substrate is adjusted to a first interval so that the substrate has a first temperature by heat transferred from the stage, a first thin film is formed on the substrate at the first temperature. The distance is then adjusted from the first interval to a second interval so that the substrate reaches a second temperature, and then a second thin film is formed on the first thin film at the second temperature, thereby forming the multi-layered structure on the substrate. The multi-layered structure can be employed for a gate insulation film or the dielectric film of a capacitor.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: January 24, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-Mei Choi, Young-Wook Park, Eun-Taek Yim, Dong-Jo Kang, Kyoung-Seok Kim
  • Publication number: 20040209430
    Abstract: Disclosed is a method for forming a multi-layered structure having at least two films on a semiconductor substrate. The substrate is disposed on a thermally conductible stage for supporting the substrate. After the distance between the stage and the substrate is adjusted to a first interval so that the substrate has a first temperature by heat transferred from the stage, a first thin film is formed on the substrate at the first temperature. The distance is then adjusted from the first interval to a second interval so that the substrate reaches a second temperature, and then a second thin film is formed on the first thin film at the second temperature, thereby forming the multi-layered structure on the substrate. The multi-layered structure can be employed for a gate insulation film or the dielectric film of a capacitor.
    Type: Application
    Filed: December 15, 2003
    Publication date: October 21, 2004
    Inventors: Han-Mei Choi, Young-Wook Park, Eun-Taek Yim, Dong-Jo Kang, Kyoung-Seok Kim