Abstract: Provided is a display control method including: obtaining a first input of a user regarding a first region displayed on a display unit; activating an input reference object in the first region based on the first input; displaying an interface for manipulating the input reference object in a second region on the display unit based on the first input; obtaining a second input of the user regarding the interface; and changing a location of the input reference object in the first region based on the second input.

Abstract: A method includes providing a device under test, which includes a lower test layer and an upper test layer that is stacked on the lower test layer and includes an overhang protruding past an edge of the lower test layer by a predetermined length, fixing the lower test layer onto a mounting stage, and measuring adhesive force of an interlayer adhesive layer in a tensile mode by applying a load to a bottom surface of the overhang of the upper test layer in a first direction. An apparatus includes a mounting stage fixing the device under test, a load applying tip applying the load to the bottom surface of the overhang, a location adjuster adjusting a distance between the device under test and the load carrying tip, a load cell detecting a magnitude of the applied load, and a controller controlling the location adjuster and the load cell.

Abstract: A method includes providing a device under test, which includes a lower test layer and an upper test layer that is stacked on the lower test layer and includes an overhang protruding past an edge of the lower test layer by a predetermined length, fixing the lower test layer onto a mounting stage, and measuring adhesive force of an interlayer adhesive layer in a tensile mode by applying a load to a bottom surface of the overhang of the upper test layer in a first direction. An apparatus includes a mounting stage fixing the device under test, a load applying tip applying the load to the bottom surface of the overhang, a location adjuster adjusting a distance between the device under test and the load carrying tip, a load cell detecting a magnitude of the applied load, and a controller controlling the location adjuster and the load cell.

Abstract: A method includes providing a device under test, which includes a lower test layer and an upper test layer that is stacked on the lower test layer and includes an overhang protruding past an edge of the lower test layer by a predetermined length, fixing the lower test layer onto a mounting stage, and measuring adhesive force of an interlayer adhesive layer in a tensile mode by applying a load to a bottom surface of the overhang of the upper test layer in a first direction. An apparatus includes a mounting stage fixing the device under test, a load applying tip applying the load to the bottom surface of the overhang, a location adjuster adjusting a distance between the device under test and the load carrying tip, a load cell detecting a magnitude of the applied load, and a controller controlling the location adjuster and the load cell.

Abstract: Provided is a display control method including: obtaining a first input of a user regarding a first region displayed on a display unit; activating an input reference object in the first region based on the first input; displaying an interface for manipulating the input reference object in a second region on the display unit based on the first input; obtaining a second input of the user regarding the interface; and changing a location of the input reference object in the first region based on the second input.

Abstract: A method includes providing a device under test, which includes a lower test layer and an upper test layer that is stacked on the lower test layer and includes an overhang protruding past an edge of the lower test layer by a predetermined length, fixing the lower test layer onto a mounting stage, and measuring adhesive force of an interlayer adhesive layer in a tensile mode by applying a load to a bottom surface of the overhang of the upper test layer in a first direction. An apparatus includes a mounting stage fixing the device under test, a load applying tip applying the load to the bottom surface of the overhang, a location adjuster adjusting a distance between the device under test and the load carrying tip, a load cell detecting a magnitude of the applied load, and a controller controlling the location adjuster and the load cell.

Abstract: In an integrated circuit (IC) chip and a flip chip package having the same, no wiring line is provided and the first electrode pad does not make contact with the wiring line in a pad area of the IC chip. Thus, the first bump structure makes contact with the first electrode regardless of the wiring line in the pad area. The second electrode pad makes contact with the wiring line in a pseudo pad area of the IC chip. Thus, the second bump structure in the pseudo pad area makes contact with an upper surface of the second electrode at a contact point(s) spaced apart from the wiring line under the second electrode.

Abstract: Provided is an electronic device which may include a first structure having a first surface, a first land region on the first surface, a second structure having a second surface facing the first surface, a second land region on the second surface, and a connection structure between the first and second structures electrically connecting the first land region to the second land region. As provided, the first land region may have a major axis and a minor axis on the first surface and the second land region may have a major axis and a minor axis on the second surface. Furthermore, the major axes of the first and second land regions may have different orientations with respect to one another.

Abstract: A mobile terminal having a display including a touch screen, and a control unit configured to display on the touch screen a plurality of key buttons, and when a first key button of the plurality of key buttons is touched, to display at least one item that is relevant to the first touched key button in an area of the touch screen defined by the key buttons.

Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate and a bonding pad disposed thereon. The semiconductor device also includes a passivation layer, a buffer layer, and an insulating layer sequentially stacked on the semiconductor substrate. According to one aspect, a first recess is defined within the passivation layer, the buffer layer, and the insulating layer to expose at least a region of the bonding pad and a second recess is defined within the insulating layer to expose at least a region of the buffer layer and spaced apart from the first recess such that a portion of the insulating layer is interposed therebetween. Further, the semiconductor device includes a conductive solder bump disposed within the first and second recesses. The conductive solder bump may be connected to the bonding pad in the first recess and supported by the buffer layer through a protrusion of the conductive solder bump extending into the second recess.

Abstract: In an integrated circuit (IC) chip and a flip chip package having the same, no wiring line is provided and the first electrode pad does not make contact with the wiring line in a pad area of the IC chip. Thus, the first bump structure makes contact with the first electrode regardless of the wiring line in the pad area. The second electrode pad makes contact with the wiring line in a pseudo pad area of the IC chip. Thus, the second bump structure in the pseudo pad area makes contact with an upper surface of the second electrode at a contact point(s) spaced apart from the wiring line under the second electrode.

Abstract: Provided is an electronic device which may include a first structure having a first surface, a first land region on the first surface, a second structure having a second surface facing the first surface, a second land region on the second surface, and a connection structure between the first and second structures electrically connecting the first land region to the second land region. As provided, the first land region may have a major axis and a minor axis on the first surface and the second land region may have a major axis and a minor axis on the second surface. Furthermore, the major axes of the first and second land regions may have different orientations with respect to one another.

Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate and a bonding pad disposed thereon. The semiconductor device also includes a passivation layer, a buffer layer, and an insulating layer sequentially stacked on the semiconductor substrate. According to one aspect, a first recess is defined within the passivation layer, the buffer layer, and the insulating layer to expose at least a region of the bonding pad and a second recess is defined within the insulating layer to expose at least a region of the buffer layer and spaced apart from the first recess such that a portion of the insulating layer is interposed therebetween. Further, the semiconductor device includes a conductive solder bump disposed within the first and second recesses. The conductive solder bump may be connected to the bonding pad in the first recess and supported by the buffer layer through a protrusion of the conductive solder bump extending into the second recess.

Abstract: A mobile terminal having a display including a touch screen, and a control unit configured to display on the touch screen a plurality of key buttons, and when a first key button of the plurality of key buttons is touched, to display at least one item that is relevant to the first touched key button in an area of the touch screen defined by the key buttons.

Abstract: A semiconductor package apparatus and a method of fabricating the semiconductor package apparatus. The semiconductor package apparatus includes: semiconductor chips comprising active and inactive surfaces and protected by a packing portion; a substrate on which the semiconductor chips are installed; leads comprising front portions electrically coupled to the active surfaces of the semiconductor chips and rear portions extending substantially to the substrate; and bonding materials bonded between ends of the rear portions of the leads and the substrate to electrically couple the leads to the substrate. Ends of the rear portions of the leads may stand on the substrate. Thus, solder joint reliability can be improved, and a wetting characteristic of solder can be improved during surface installation. Also, semiconductor package apparatuses having similar attributes can easily be multilayered. In addition, a foot print of the semiconductor package apparatus can be reduced to enable high-density installation.

Abstract: Provided is a semiconductor device package comprising a printed circuit board, the printed circuit board including a window at a central portion and a connection part, a semiconductor chip including center-type bonding pads, wherein the semiconductor chip is mounted on an upper surface of the printed circuit board such that the center-type bonding pads are exposed by the window, bonding wires electrically connecting the center-type bonding pads with the printed circuit board through the window, a lower molding material at a lower surface of the printed circuit board, the lower molding material encapsulating the center-type bonding pads and the bonding wires, and an upper molding material encapsulating the semiconductor chip and the upper surface of the printed circuit board, wherein the lower molding material and the upper molding material are connected to each other through the connection part of the printed circuit board.

Abstract: Provided is a board-on-chip package and stack package using the same to reduce the likelihood that bonding wires in an encapsulant may be damaged due to mechanical stresses applied during a package stacking process. A semiconductor package may have a spacer provided along the opposing sides of an encapsulant. The spacer may be spaced away from bonding wires embedded in the encapsulant. The height of the spacer may be greater than the height of the encapsulated bonding wire from the bottom surface of the semiconductor package. The spacer may be formed of a bar or a protrusion. In a stack package using the semiconductor package, the spacer may be provided between a semiconductor chip of a lower semiconductor package and an encapsulant of an upper semiconductor package.

Abstract: A semiconductor package and a method for forming the same are provided. The semiconductor package comprises a chip having an active surface and a back surface. The semiconductor package further comprises a substrate having an upper surface and a lower surface opposite the upper surface. The chip is electrically connected to the upper surface of the substrate. A lid is thermally coupled to the back surface of the chip. A thermal interface material (TIM) is located between the chip and the lid. The TIM includes voids to reduce thermomechanical stresses applied on the chip and the TIM, thereby preventing package cracks.

Abstract: An array of solder structures comprising a plurality of radially-curved exterior surfaces, each one enclosing a predetermined-sized cavity that can be used for flexibly joining together at predetermined conductive contact points two planar elements having dissimilar properties. By assembling the two planar elements in a tiered arrangement, one planar element having an array of annular conductive pads and the other planar element having either a corresponding array of annular or circular conductive pads, separated by an array of spherical solder balls comprised of solder and a fluxing agent, a hollow solder structure can be created during a melting and subsequent cooling of the solder compound. The plasticity/resiliency characteristics of the resulting hollow solder structure absorbs lateral movement of the two planar elements relative to each other without degradation of the solder joint.

Abstract: A semiconductor package and a method for forming the same are provided. The semiconductor package comprises a chip having an active surface and a back surface. The semiconductor package further comprises a substrate having an upper surface and a lower surface opposite the upper surface. The chip is electrically connected to the upper surface of the substrate. A lid is thermally coupled to the back surface of the chip. A thermal interface material (TIM) is located between the chip and the lid. The TIM includes voids to reduce thermomechanical stresses applied on the chip and the TIM, thereby preventing package cracks.