Abstract: Provided is a method of post treating graphene including providing graphene on a metal thin film, providing a carrier on the graphene, hardening the carrier, and removing the metal thin film from the graphene.

Abstract: A graphene manufacturing apparatus includes a gas supplying unit supplying a gas including carbon; a gas heating unit heating the gas supplied from the gas supplying unit; a deposition chamber in which a substrate having a catalyst layer is disposed; and an inlet pipe introducing the gas of the gas heating unit into the deposition chamber. A temperature of the deposition chamber is set at a temperature lower than a temperature of the gas heating unit so that a selection range with respect to a catalyst metal to be used in the catalyst layer may be expanded, and damage of the substrate due to a high temperature heat may be minimized.

Abstract: A method of transferring graphene, the method including: preparing a graphene forming structure including a base member, an oxide layer that is hydrophilic and is formed on the base member, a metal catalyst layer that is hydrophobic and is formed on the oxide layer, and graphene that is formed on the metal catalyst layer; attaching the graphene forming structure on a surface of a first carrier; separating the oxide layer from the metal catalyst layer by applying steam to the graphene forming structure; and removing the metal catalyst layer.

Abstract: A graphene synthesis chamber includes: a chamber case in which a substrate including a metal thin film is placed; a gas supply unit which supplies at least one gas comprising a carbon gas into an inner space of the chamber case; a main heating unit which emits at least one light to the inner space to heat the substrate; and at least one auxiliary heating unit which absorbs the at least one light and emits radiant heat toward the substrate.

Abstract: A method of fabricating multi-layered graphene includes disposing a first graphene layer on a carrier; disposing at least one second graphene layer on the first graphene layer to form a graphene sheet disposed on the carrier; and transferring the graphene sheet disposed on the carrier onto a substrate, wherein each of the graphene layers which constitute the graphene sheet has at least one damaged region, and the at least one damaged region of each of the graphene layers contacts at least one of non-damaged regions of a graphene layer or graphene layers, of the graphene layers, contacting the each of the graphene layers.

Abstract: Provided are a method and apparatus of manufacturing high quality large area graphene in large quantities. The method includes placing a supporting belt, on which a catalyst layer is loaded, into a chamber; increasing a temperature of the catalyst layer by injecting a carbon source into the chamber; forming graphene on the catalyst layer by cooling the catalyst layer; and taking out the supporting belt, on which the catalyst layer, on which the graphene is formed, is loaded, from the chamber to an outside, wherein a ratio between a melting point of the supporting belt and a maximum temperature Tmax of the catalyst metal layer that the catalyst layer is heated in the chamber is equal to or less than 0.6.

Abstract: A method of transferring graphene, the method including: preparing a graphene forming structure including a base member, an oxide layer that is hydrophilic and is formed on the base member, a metal catalyst layer that is hydrophobic and is formed on the oxide layer, and graphene that is formed on the metal catalyst layer; attaching the graphene forming structure on a surface of a first carrier; separating the oxide layer from the metal catalyst layer by applying steam to the graphene forming structure; and removing the metal catalyst layer.

Abstract: Provided is a method of manufacturing a printed circuit board. In an embodiment, the method includes forming a prepreg layer via a reel method, forming a conductive film for forming a circuit pattern on at least one surface of the prepreg layer; and forming a predetermined circuit pattern on the conductive film. In an embodiment, the prepreg layer has a thickness of at most about 0.15 mm and contains a fiber material and a resin material. In an embodiment, the content of the resin material in the prepreg layer is about 70% or less by volume. In an embodiment, the prepreg layer is composed of at least one prepreg layer.

Abstract: Provided are a method and apparatus for manufacturing a multi-layer substrate. The method includes: rolling out a base substrate that is rolled up into a substrate supply roll and delivering the base substrate to a compression roller system; compressing and laminating a laminating material on the base substrate in a vacuum state using the compression roller system; and cooling the base substrate on which the laminating material is laminated.

Abstract: Provided is a method of manufacturing a printed circuit board. In an embodiment, the method includes forming a prepreg layer via a reel method, forming a conductive film for forming a circuit pattern on at least one surface of the prepreg layer; and forming a predetermined circuit pattern on the conductive film. In an embodiment, the prepreg layer has a thickness of at most about 0.15 mm and contains a fiber material and a resin material. In an embodiment, the content of the resin material in the prepreg layer is about 70% or less by volume. In an embodiment, the prepreg layer is composed of at least one prepreg layer.

Abstract: Provided is a method of manufacturing a printed circuit board. In an embodiment, the method includes forming a prepreg layer via a reel method, forming a conductive film for forming a circuit pattern on at least one surface of the prepreg layer; and forming a predetermined circuit pattern on the conductive film. In an embodiment, the prepreg layer has a thickness of at most about 0.15 mm and contains a fiber material and a resin material. In an embodiment, the content of the resin material in the prepreg layer is about 70% or less by volume. In an embodiment, the prepreg layer is composed of at least one prepreg layer.

Abstract: A parent or master substrate for a semiconductor package is provided, which can provide a plurality of unit substrates by cutting into pieces for producing a semiconductor device. The parent substrate includes an insulation layer, conductor patterns formed on first and second surfaces of the insulation layer, and PSR (photo solder resist) layers respectively formed on the first and second surfaces of the insulation layers and covering the conductor patterns. The parent substrate includes an upper part and a lower part divided by a reference surface which passes through the center of the insulation layer. When an equivalent thermal expansion coefficient ?upper of the upper part is defined by the Equation of ? upper = ? i = 1 n ? ? i × E i × v i ? i = 1 n ? E i × v i , where ?i is respective thermal expansion coefficients of, Ei is respective elastic moduli of, and vi is respective volume ratios of first through nth components constituting the upper part (e.g.

Abstract: Provided is a method of manufacturing a printed circuit board. In an embodiment, the method includes forming a prepreg layer via a reel method, forming a conductive film for forming a circuit pattern on at least one surface of the prepreg layer; and forming a predetermined circuit pattern on the conductive film. In an embodiment, the prepreg layer has a thickness of at most about 0.15 mm and contains a fiber material and a resin material. In an embodiment, the content of the resin material in the prepreg layer is about 70% or less by volume. In an embodiment, the prepreg layer is composed of at least one prepreg layer.

Abstract: A parent or master substrate for a semiconductor package is provided, which can provide a plurality of unit substrates by cutting into pieces for producing a semiconductor device. The parent substrate includes an insulation layer, conductor patterns formed on first and second surfaces of the insulation layer, and PSR (photo solder resist) layers respectively formed on the first and second surfaces of the insulation layers and covering the conductor patterns. The parent substrate includes an upper part and a lower part divided by a reference surface which passes through the center of the insulation layer. When an equivalent thermal expansion coefficient ?upper of the upper part is defined by the Equation of ? upper = ? i = 1 n ? ? i × E i × v i ? i = 1 n ? E i × v i , where ?i is respective thermal expansion coefficients of, Ei is respective elastic moduli of, and vi is respective volume ratios of first through nth components constituting the upper part (e.g.