Abstract: A method of transferring data between a timing controller and a plurality of source drivers in a display device is disclosed. The method includes: (a) setting a first source driver of the plurality of source drivers to convert first signals having first voltage levels to second signals having second voltage levels; (b) receiving, by the first source driver, a first test pattern from the timing controller; (c) performing a test by the first source driver, based on the first test pattern, to determine whether an error has occurred in the first test pattern; and (d) when an error has occurred in the first test pattern, adjusting, by the first source driver, an output level of a receiver of the first source driver, so that the first source driver converts the first signals to third signals having third voltage levels different from the second voltage levels.

Abstract: A digital double sampling method, a related complementary metal oxide semiconductor (CMOS) image sensor, and a digital camera comprising the CMOS image sensor are disclosed. The method includes generating first digital data corresponding to an initial voltage level apparent in a pixel in response to a reset signal, inverting the first digital data, outputting a detection voltage corresponding to image data received from outside of the CMOS image sensor, and counting in synchronization with a clock signal, starting from an initial value equal to the inverted first digital data, and for an amount of time responsive to a voltage level of the detection voltage.

Abstract: A digital double sampling method, a related complementary metal oxide semiconductor (CMOS) image sensor, and a digital camera comprising the CMOS image sensor are disclosed. The method includes generating first digital data corresponding to an initial voltage level apparent in a pixel in response to a reset signal, inverting the first digital data, outputting a detection voltage corresponding to image data received from outside of the CMOS image sensor, and counting in synchronization with a clock signal, starting from an initial value equal to the inverted first digital data, and for an amount of time responsive to a voltage level of the detection voltage.

Abstract: A complementary metal oxide semiconductor (CMOS) image sensor includes a photodiode, a switch and a comparator. The switch transfers a sensing signal to a sensing node from the photodiode. The comparator, which is directly connected to the sensing node, compares the sensing signal of the sensing node with a reference signal. The comparator outputs a signal corresponding to a voltage difference between the sensing signal and the reference signal.

Abstract: An image sensor comprises an active pixel sensor (APS) array, a first analog-to-digital converter (ADC) and a ramp signal generator. The APS array includes a plurality of pixels arranged in a two-dimensional matrix, wherein the APS array generates a reset signal and an image signal for each selected column of the APS array. The first ADC includes a correlated double sampling (CDS) circuit array comprising CDS circuits that are arranged for each column of the APS array, wherein the first ADC generates a digital code from a signal corresponding to the difference between the reset signal and the image signal which are generated by the CDS circuit using a ramp signal. The ramp signal generator generates the ramp signal, wherein a second ADC receives a feedback of the generated ramp signal and generates a feedback reference code, and wherein the ramp signal generator calibrates the ramp signal based on a comparison using the feedback reference code.

Abstract: A plasma display and a method of driving the plasma display. The plasma display includes a plasma display panel including a plurality of discharge cells corresponding to sustain electrodes and scan electrodes. A first transistor is coupled between a first power source and a node coupled to the scan electrodes. A second transistor and a diode are coupled in series between a second power source and the node. The first and second transistors are alternately turned on during a sustain period, and the diode is configured to interrupt a current flowing from the second power source to the node.

Abstract: In a plasma display and a driving method thereof, a sustain pulse of a high level voltage is supplied to a scan electrode or a sustain electrode during a sustain period using a capacitor charged to a voltage corresponding to a voltage difference between a high scan voltage and a low scan voltage. A low-voltage capacity transistor is connected between a power source and the scan electrode, the power source supplying a high level voltage to the scan electrode. Using the low-voltage capacity transistor results in reduced driving circuit costs and, in addition, the number of times that a transistor supplying the high scan voltage to the scan electrode and a transistor supplying the low scan voltage to the scan electrode is reduced, thereby reducing ElectroMagnetic Interference (EMI).

Abstract: A complementary metal oxide semiconductor (CMOS) image sensor includes a photodiode, a switch and a comparator. The switch transfers a sensing signal to a sensing node from the photodiode. The comparator, which is directly connected to the sensing node, compares the sensing signal of the sensing node with a reference signal. The comparator outputs a signal corresponding to a voltage difference between the sensing signal and the reference signal.

Abstract: A digital double sampling method, a related complementary metal oxide semiconductor (CMOS) image sensor, and a digital camera comprising the CMOS image sensor are disclosed. The method includes generating first digital data corresponding to an initial voltage level apparent in a pixel in response to a reset signal, inverting the first digital data, outputting a detection voltage corresponding to image data received from outside of the CMOS image sensor, and counting in synchronization with a clock signal, starting from an initial value equal to the inverted first digital data, and for an amount of time responsive to a voltage level of the detection voltage.

Abstract: A plasma display device includes a PDP, a driver for supplying driving signals to the PDP, and a power supply for supplying a power source to the driver. The power supply includes first and second resistors coupled in series between two terminals for outputting a predetermined output voltage, and a shunt regulator for maintaining a node of the first and second resistors at a constant voltage by coupling a node of the first and second resistors to a reference terminal. At least one of the first and second resistors is a variable resistor of which a resistance is changed by a change of temperature. With such a structure, a low discharge may be prevented when the power supply changes a predetermined voltage used in the plasma display device according to a change of temperature.

Abstract: An image sensor comprises an active pixel sensor (APS) array, a first analog-to-digital converter (ADC) and a ramp signal generator. The APS array includes a plurality of pixels arranged in a two-dimensional matrix, wherein the APS array generates a reset signal and an image signal for each selected column of the APS array. The first ADC includes a correlated double sampling (CDS) circuit array comprising CDS circuits that are arranged for each column of the APS array, wherein the first ADC generates a digital code from a signal corresponding to the difference between the reset signal and the image signal which are generated by the CDS circuit using a ramp signal. The ramp signal generator generates the ramp signal, wherein a second ADC receives a feedback of the generated ramp signal and generates a feedback reference code, and wherein the ramp signal generator calibrates the ramp signal based on a comparison using the feedback reference code.

Abstract: In the plasma display device, a voltage of a power recovery capacitor is set to be greater than half of a sustain discharge voltage when a voltage of a power recovery circuit is increased, and is set to be lower than half of the sustain discharge voltage when the voltage of the power recovery circuit is decreased. Accordingly, power recovery efficiency can be improved.

Abstract: A voltage sag and over-voltage compensation device for an AC electric power distribution system employing cascaded switching devices and a pulse-width modulated transformer. Each stage of the cascaded switching device includes a switching element located within a full-bridge rectifier circuit to allow bi-directional switching through each switching element (i.e., switching through the same switching element during the positive and negative portions of the AC voltage cycle). Each full-bridge rectifier also includes a snubber circuit connected in parallel with a corresponding switching element to absorb the current discharge caused by switching the input power supply to the transformer through the corresponding switching device under non-zero current conditions.

Abstract: A voltage sag and over-voltage compensation device for an AC electric power distribution system employing cascaded switching devices and a pulse-width modulated transformer. Each stage of the cascaded switching device includes a switching element located within a full-bridge rectifier circuit to allow bi-directional switching through each switching element (i.e., switching through the same switching element during the positive and negative portions of the AC voltage cycle). Each full-bridge rectifier also includes a snubber circuit connected in parallel with a corresponding switching element to absorb the current discharge caused by switching the input power supply to the transformer through the corresponding switching device under non-zero current conditions.

Abstract: Disclosed are a phase distortion compensating apparatus and method for reducing a torque ripple in a 3-phase motor using four switching elements, which are capable of adjusting respective switching times of phase voltages, to be supplied to the 3-phase motor by an inverter including the switching elements, based on a voltage difference between upper and lower DC link capacitors respectively adapted to supply voltages to the inverter, thereby reducing a torque ripple generated in the motor.

Abstract: An apparatus for detecting a rotor position in a brushless direct current (BLDC) motor, in which a rotor position can be detected by a virtual neutral point voltage and current of one phase in a motor. The number of circuits required for the rotor position detection is reduced to save the production cost and reduce the space occupied by a position detecting circuit.

Abstract: Disclosed are a voltage compensating apparatus and method for a 3-phase inverter using four switches, to compensate for a severe distortion of a 3-phase application voltage due to a voltage ripple.

Abstract: Disclosed are a phase distortion compensating apparatus and method for reducing a torque ripple in a 3-phase motor using four switching elements, which are capable of adjusting respective switching times of phase voltages, to be supplied to the 3-phase motor by an inverter including the switching elements, based on a voltage difference between upper and lower DC link capacitors respectively adapted to supply voltages to the inverter, thereby reducing a torque ripple generated in the motor.

Abstract: Disclosed are a voltage compensating apparatus and method for a 3-phase inverter using four switches, to compensate for a severe distortion of a 3-phase application voltage due to a voltage ripple.

Abstract: An improved method for forming a capacitor which is capable of increasing cell capacitance is disclosed. The capacitor easily formed a sequential two-step etching processes. The two-step etching include a selectively etching to form the contact hole for exposing an etch stop layer between gate electrodes, and an isotopically dry etching to maximize capacitor surface area without cleaning process after the selectively etching, an interlayer insulating layer being patterned in a manner which produces inner interlayer contact sidewalls having standing wave ripples and removes the exposed etch stop layer. As a result, it is found that the capacitor which is obtained by a simple and easy two-step dry etching exhibits an increased capacitor surface area. Furthermore, it is possible to form the stacked capacitor having sufficiently high storage capacitance without increasing the contact resistance.