Patents by Inventor Dong-Shan Chen

Dong-Shan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220029852
    Abstract: A signal relay system includes an input terminal, an output terminal, a signal detector, a signal repeater, an input terminal circuit, an output terminal circuit, a switch and a switch controller. The signal detector is for detecting a wakeup signal from the input terminal. The signal repeater is for receiving a transmission signal and to amplify and forward the transmission signal. The input terminal circuit is for reducing impedance between the input terminal and the signal repeater. The output terminal circuit is for reducing impedance between the output terminal and the signal repeater. The switch is for coupling the output terminal to the signal repeater or the input terminal. The switch controller is for operating the switch according to a detection result of the signal detector.
    Type: Application
    Filed: October 29, 2020
    Publication date: January 27, 2022
    Inventors: Tsung-Han Wu, Dong-Shan Chen
  • Patent number: 10826493
    Abstract: A gate driving circuit for providing a high driving voltage includes a first N-type high-voltage transistor and a second N-type high-voltage transistor connected in series between a driving voltage output node and a system low-voltage source. A voltage difference between a system high-voltage source and the system low-voltage source is greater than a withstand voltage of the first or second N-type high-voltage transistor. When the driving voltage output node is to output a system high voltage, the first N-type high-voltage transistor and the second N-type high-voltage transistor are turned off. Deep N-type well regions of the first N-type high-voltage transistor and the second N-type high-voltage transistor are applied with a first bias voltage. A voltage difference between the first bias voltage and the system low-voltage source is smaller than an interface breakdown voltage between the deep N-type well region and a P-type well region of the second N-type high-voltage transistor.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: November 3, 2020
    Assignee: ITE Tech. Inc.
    Inventors: Yi-Chung Chou, Chih-Yuan Kuo, Dong-Shan Chen
  • Patent number: 9904642
    Abstract: A detection circuit of Universal Serial Bus (USB) is provided. A port of the USB has a first configuration channel pin and a second configuration channel pin, and the first and second configuration channel pins are disposed on opposite sides. The detection circuit includes a switch unit and a detection unit. The switch unit is coupled to the first and second configuration channel pins to sequentially provide a first voltage level of the first configuration channel pin and a second voltage level of the second configuration channel pin. The detection unit is coupled to the switch unit and correspondingly provides a state reference signal according to the first and second voltage levels.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: February 27, 2018
    Assignee: ITE TECH. INC.
    Inventors: Yi-Chung Chou, Dong-Shan Chen, Chih-Chieh Wu
  • Publication number: 20170017598
    Abstract: A detection circuit of Universal Serial Bus (USB) is provided. A port of the USB has a first configuration channel pin and a second configuration channel pin, and the first and second configuration channel pins are disposed on opposite sides. The detection circuit includes a switch unit and a detection unit. The switch unit is coupled to the first and second configuration channel pins to sequentially provide a first voltage level of the first configuration channel pin and a second voltage level of the second configuration channel pin. The detection unit is coupled to the switch unit and correspondingly provides a state reference signal according to the first and second voltage levels.
    Type: Application
    Filed: October 19, 2015
    Publication date: January 19, 2017
    Applicant: ITE TECH. INC.
    Inventors: Yi-Chung Chou, Dong-Shan Chen, Chih-Chieh Wu