Abstract: An electronic device includes a substrate having substrate upper side and a conductive structure. An electronic component is coupled to the conductive structure. A vertical interconnect is coupled to the substrate upper side. An encapsulant covers the electronic component, the vertical interconnect, and the substrate upper side of the substrate. A first metallic coating includes a first metallic coating top side, a first metallic coating sidewall; and a first metallic coating thickness and a second metallic coating includes a second metallic coating thickness. The vertical interconnect is exposed from the encapsulant top side; and is coupled to the first metallic coating. The first metallic coating top side is over the encapsulant top side and over the encapsulant lateral side. The second metallic coating is over the encapsulant top side and the first metallic coating top side is interposed between the encapsulant top side and the second metallic coating.

Abstract: In one example, an electronic device comprises a substrate comprising a conductive structure and an inner side and an outer side, a first electronic component over the inner side of the substrate and coupled with the conductive structure, a lid over the substrate and the first electronic component and comprising a first hole in the lid, and a thermal interface material between the first electronic component and the lid. The thermal interface material is in the first hole. Other examples and related methods are also disclosed herein.

Abstract: In one example, an electronic device includes a substrate having an upper side, a lower side opposite to the upper side, a lateral side connecting the upper side to the lower side, and a conductive structure. An electronic component is coupled to the conductive structure at the upper side of the substrate. An encapsulant covers a lateral side of the electronic component and the upper side of the substrate and having an encapsulant top side and an encapsulant lateral side. The electronic device includes first metallic coating having a first metallic coating top side, a first metallic coating sidewall; and a first metallic coating thickness. The electronic device includes a second metallic coating having a second metallic coating thickness that is greater than the first metallic coating thickness.

Abstract: In one example, an electronic device, comprises a substrate comprising a first side and a second side opposite to the first side, wherein the substrate comprises dimples on the first side of the substrate, an electronic component over the first side of the substrate, an encapsulant over the first side of the substrate and covering a lateral side of the electronic component, and a first interconnect in the encapsulant and coupled to the electronic component and the substrate. Other examples and related methods are also disclosed herein.

Abstract: In one example, an electronic device comprises a substrate comprising a conductive structure and an inner side and an outer side, a first electronic component over the inner side of the substrate and coupled with the conductive structure, a lid over the substrate and the first electronic component and comprising a first hole in the lid, and a thermal interface material between the first electronic component and the lid. The thermal interface material is in the first hole. Other examples and related methods are also disclosed herein.

Abstract: An electronic device includes a substrate including a first side comprising a peripheral portion and a central portion surrounded by the peripheral portion, and a conductive structure. A first electronic component includes a component first side coupled to the substrate in the central portion and a component second side. A second electronic component is coupled to the substrate in the peripheral portion. An encapsulant covers the second electronic component and the peripheral portion of the first side. The second side of the first electronic component is exposed from the top side of the encapsulant. A thermal stress reducing structure comprising one or more of a stiffener coupled to the top side of the encapsulant in the peripheral portion and overlapping the second electronic component, or a heat sink coupled to the second side of the first electronic component. Other examples and related methods are also disclosed herein.

Abstract: In one example, an electronic device comprises a substrate comprising a dielectric structure and a conductive structure, a first electronic component over a top side of the substrate and coupled with the conductive structure, a lid over the first electronic component and coupled with a top side of the substrate, wherein the lid comprises a top plate having a plurality of holes, and a covering material covering a lateral side of the first electronic component and extending between the top side of the substrate and a bottom side of the top plate of the lid. Other examples and related methods are also disclosed herein.

Abstract: In one example, an electronic device includes a substrate including a substrate first side, a substrate second side, and a conductive structure. An electronic component includes a component first side coupled to the conductive structure at the substrate first side, a component second side, and a component lateral side connecting the component first side to the component second side. A lid structure includes a first lid having a first lid side wall coupled to the substrate and a first lid top coupled to the first lid side wall and an opening over the component second side. The lid structure includes second lid with a second lid top coupled to the first lid top and a lid channel coupled to the opening. A thermal interface material is within the opening and covers at least a portion of the component second side. Other examples and related methods are also disclosed herein.

Abstract: In one example, an electronic device comprises a substrate comprising a conductive structure and an inner side and an outer side, a first electronic component over the inner side of the substrate and coupled with the conductive structure, a lid over the substrate and the first electronic component and comprising a first hole in the lid, and a thermal interface material between the first electronic component and the lid. The thermal interface material is in the first hole. Other examples and related methods are also disclosed herein.

Abstract: In one example, an electronic device includes a substrate having an upper side, a lower side opposite to the upper side, a lateral side connecting the upper side to the lower side, and a conductive structure. An electronic component is coupled to the conductive structure at the upper side of the substrate. An encapsulant covers a lateral side of the electronic component and the upper side of the substrate and having an encapsulant top side and an encapsulant lateral side. The electronic device includes first metallic coating having a first metallic coating top side, a first metallic coating sidewall; and a first metallic coating thickness. The electronic device includes a second metallic coating having a second metallic coating thickness that is greater than the first metallic coating thickness.

Abstract: In one example, a system comprises a laser assisted bonding (LAB) tool. The LAB tool comprises a stage block and a first lateral laser source facing the stage block from a lateral side of the stage block. The stage block is configured to support a substrate and a first electronic component coupled with the substrate, and the first electronic component comprises a first interconnect. The first lateral laser source is configured to emit a first lateral laser beam laterally toward the stage block to induce a first heat on the first interconnect to bond the first interconnect with the substrate. Other examples and related methods are also disclosed herein.

Abstract: In one example, a method to manufacture a semiconductor device comprises providing an electronic component over a substrate, wherein an interconnect of the electronic component contacts a conductive structure of the substrate, providing the substrate over a laser assisted bonding (LAB) tool, wherein the LAB tool comprises a stage block with a window, and heating the interconnect with a laser beam through the window until the interconnect is bonded with the conductive structure. Other examples and related methods are also disclosed herein.

Abstract: In one example, a system comprises a laser assisted bonding (LAB) tool. The LAB tool comprises a stage block and a first lateral laser source facing the stage block from a lateral side of the stage block. The stage block is configured to support a substrate and a first electronic component coupled with the substrate, and the first electronic component comprises a first interconnect. The first lateral laser source is configured to emit a first lateral laser beam laterally toward the stage block to induce a first heat on the first interconnect to bond the first interconnect with the substrate. Other examples and related methods are also disclosed herein.

Abstract: In one example, a method to manufacture a semiconductor device comprises providing an electronic component over a substrate, wherein an interconnect of the electronic component contacts a conductive structure of the substrate, providing the substrate over a laser assisted bonding (LAB) tool, wherein the LAB tool comprises a stage block with a window, and heating the interconnect with a laser beam through the window until the interconnect is bonded with the conductive structure. Other examples and related methods are also disclosed herein.

Abstract: In one example, a system can comprise a laser assisted bonding (LAB) tool comprising a stage block and a laser source facing the stage block. The stage block can be configured to support a first substrate and a first electronic component coupled with the first substrate, the first electronic component comprising a first interconnect. The laser source can be configured to emit a first laser towards the stage block to induce a first heat on the first interconnect to bond the first interconnect with the first substrate. Other examples and related methods are also disclosed herein.

Abstract: Laser assisted bonding for semiconductor die interconnections is disclosed and may, for example, include forming flux on a circuit pattern on a circuit board, placing a semiconductor die on the circuit board where a bump on the semiconductor die contacts the flux, and reflowing the bump by directing a laser beam toward the semiconductor die. The laser beam may volatize the flux and make an electrical connection between the bump and the circuit pattern. A jig plate may be placed on the semiconductor die when the laser beam is directed toward the semiconductor die. Warpage may be reduced during heating or cooling of the semiconductor die by applying pressure to the jig plate. Jig bars may extend outward from the jig plate and may be in contact with the circuit board during the application of pressure to the jig plate. The jig plate may comprise one or more of: silicon, silicon carbide, and glass.

Abstract: Laser assisted bonding for semiconductor die interconnections is disclosed and may, for example, include forming flux on a circuit pattern on a circuit board, placing a semiconductor die on the circuit board where a bump on the semiconductor die contacts the flux, and reflowing the bump by directing a laser beam toward the semiconductor die. The laser beam may volatize the flux and make an electrical connection between the bump and the circuit pattern. A jig plate may be placed on the semiconductor die when the laser beam is directed toward the semiconductor die. Warpage may be reduced during heating or cooling of the semiconductor die by applying pressure to the jig plate. Jig bars may extend outward from the jig plate and may be in contact with the circuit board during the application of pressure to the jig plate. The jig plate may comprise one or more of: silicon, silicon carbide, and glass.

Abstract: Disclosed is a substrate for semiconductor package and a wire bonding method using thereof. The substrate is provided with at least one reference mark on its surface to check a loading position and a shift state of a solder mask. The reference mark is composed of a combination of a reference pattern and a solder mask opening and is positioned in any location on an outer peripheral edge of a die attachment region. The reference mark may take various shapes. A method for checking a solder mask shift using the reference mark includes comparing a design value of the reference pattern and the solder mask opening with the reference pattern and the solder mask opening, which are formed in an actual material. After the solder mask shift is calculated, a wire bonding coordinate is newly constructed in consideration of the solder mask shift. This minimizes the wire bonding error.