Abstract: An integrated circuit device may include a gate insulation layer covering a top surface and opposite sidewalls of a fin-shaped active region, a gate electrode covering the gate insulation layer and a hydrogen atomic layer disposed along an interface between the fin-shaped active region and the gate insulation layer. A method of manufacturing the integrated circuit device may include forming an insulating layer covering a lower portion of a preliminary fin-shaped active region, forming a fin-shaped active region having an outer surface with an increased smoothness through annealing an upper portion of the preliminary fin-shaped active region in a hydrogen atmosphere and forming a hydrogen atomic layer covering the outer surface of the fin-shaped active region. A gate insulation layer and a gate electrode may be formed to cover a top surface and opposite sidewalls of the fin-shaped active region.

Abstract: An integrated circuit device may include a gate insulation layer covering a top surface and opposite sidewalls of a fin-shaped active region, a gate electrode covering the gate insulation layer and a hydrogen atomic layer disposed along an interface between the fin-shaped active region and the gate insulation layer. A method of manufacturing the integrated circuit device may include forming an insulating layer covering a lower portion of a preliminary fin-shaped active region, forming a fin-shaped active region having an outer surface with an increased smoothness through annealing an upper portion of the preliminary fin-shaped active region in a hydrogen atmosphere and forming a hydrogen atomic layer covering the outer surface of the fin-shaped active region. A gate insulation layer and a gate electrode may be formed to cover a top surface and opposite sidewalls of the fin-shaped active region.

Abstract: An integrated circuit device may include a gate insulation layer covering a top surface and opposite sidewalls of a fin-shaped active region, a gate electrode covering the gate insulation layer and a hydrogen atomic layer disposed along an interface between the fin-shaped active region and the gate insulation layer. A method of manufacturing the integrated circuit device may include forming an insulating layer covering a lower portion of a preliminary fin-shaped active region, forming a fin-shaped active region having an outer surface with an increased smoothness through annealing an upper portion of the preliminary fin-shaped active region in a hydrogen atmosphere and forming a hydrogen atomic layer covering the outer surface of the fin-shaped active region. A gate insulation layer and a gate electrode may be formed to cover a top surface and opposite sidewalls of the fin-shaped active region.

Abstract: A method of forming a semiconductor device includes forming a sacrificial gate pattern on an active pattern, forming spacers on opposite sidewalls of the sacrificial gate pattern, forming an interlayer insulating layer on the active pattern and the spacers, removing the sacrificial gate pattern to form a gate trench that exposes a region of the active pattern, forming a gate dielectric layer on the region of the active pattern exposed by the gate trench, performing a first heat treatment at a pressure of less than 1 atm to remove impurities in the interlayer insulating layer, performing a second heat treatment on the gate dielectric layer at a temperature greater than a temperature of the first heat treatment, and forming a gate electrode in the gate trench.

Abstract: In a method of forming a layer, a substrate is loaded into a chamber and placed at a home position that is a first relative angular position. A process cycle is performed a number of times while the substrate is at the home position. The cycle includes directing source gas onto the substrate at a first location adjacent the periphery of the substrate, purging the chamber, directing reaction gas onto the substrate from the first location, and purging the chamber. The cycle is performed another number of times while the substrate is at another relative angular position, i.e., at a position rotated about its general center relative from the home position.

Abstract: A method of forming a semiconductor device includes forming a sacrificial gate pattern on an active pattern, forming spacers on opposite sidewalls of the sacrificial gate pattern, forming an interlayer insulating layer on the active pattern and the spacers, removing the sacrificial gate pattern to form a gate trench that exposes a region of the active pattern, forming a gate dielectric layer on the region of the active pattern exposed by the gate trench, performing a first heat treatment at a pressure of less than 1 atm to remove impurities in the interlayer insulating layer, performing a second heat treatment on the gate dielectric layer at a temperature greater than a temperature of the first heat treatment, and forming a gate electrode in the gate trench.

Abstract: An integrated circuit device may include a gate insulation layer covering a top surface and opposite sidewalls of a fin-shaped active region, a gate electrode covering the gate insulation layer and a hydrogen atomic layer disposed along an interface between the fin-shaped active region and the gate insulation layer. A method of manufacturing the integrated circuit device may include forming an insulating layer covering a lower portion of a preliminary fin-shaped active region, forming a fin-shaped active region having an outer surface with an increased smoothness through annealing an upper portion of the preliminary fin-shaped active region in a hydrogen atmosphere and forming a hydrogen atomic layer covering the outer surface of the fin-shaped active region. A gate insulation layer and a gate electrode may be formed to cover a top surface and opposite sidewalls of the fin-shaped active region.

Abstract: In a method of forming a layer, a substrate is loaded into a chamber and placed at a home position that is a first relative angular position. A process cycle is performed a number of times while the substrate is at the home position. The cycle includes directing source gas onto the substrate at a first location adjacent the periphery of the substrate, purging the chamber, directing reaction gas onto the substrate from the first location, and purging the chamber. The cycle is performed another number of times while the substrate is at another relative angular position, i.e., at a position rotated about its general center relative from the home position.