Abstract: A fully symmetrical and balanced monolithic or multi-die integrated circuit transformer device is described. The device can comprise a first and second transformer. The first and second transformer can each comprise a symmetrical bottom coil including electrically conductive crossovers between individual windings of pairs of adjacent windings. Each of the bottom coils can further comprise a first, a second differential terminal, and a center tap third terminal electrically connected to the inner-most winding of the bottom coil. Each transformer can further comprise a spiral top coil electrically connected to an encompassed inner pad and a laterally offset outer pad, the top coil, inner pad, and outer pad including a shared electrically conductive integrated circuit layer. The respective top coils of each transformer can be overlaid and separated from the respective bottom coils by an electrically insulating dielectric layer.

Abstract: Methods and apparatus are disclosed for communicating multiple logic states across a digital isolator. The digital isolator is a universal serial bus (USB) isolator in some embodiments. The digital isolator includes one or more single-bit data channels. Three or more logic states of information are transmitted across the single-bit data channel(s). The logic states are distinguished by a pulse sequence, and in particular a number of edges of the pulse sequence and a final value or final edge of the pulse sequence.

Abstract: Methods and apparatus are disclosed for communicating multiple logic states across a digital isolator. The digital isolator is a universal serial bus (USB) isolator in some embodiments. The digital isolator includes one or more single-bit data channels. Three or more logic states of information are transmitted across the single-bit data channel(s). The logic states are distinguished by a pulse sequence, and in particular a number of edges of the pulse sequence and a final value or final edge of the pulse sequence.

Abstract: An integrated circuit is provided for use in conjunction with an external antenna. The integrated circuit includes a memory circuit, a pulse sequencer, an NMR transmitter circuit and an NMR receiver circuit. The memory circuit is configured to store user-defined parameter data pertaining to an excitation period and an acquisition period that are part of an NMR pulse sequence. The pulse sequencer and the NMR transmitter circuit are configured to cooperate to generate RF signals in accordance the user-defined parameter data stored in the memory circuit, wherein such RF signals are supplied to the external antenna for emitting excitation signals from the external antenna during the excitation period of the NMR pulse sequence. The NMR receiver circuit is configured to receive electrical signals generated by the external antenna during the acquisition period of the NMR pulse sequence.

Abstract: Embodiments of the present disclosure may provide a method of calibrating an isolator system. The method may comprise the steps of driving a common signal to a pair of input terminals of the isolator system; measuring differences in signals at output terminals of the isolator system; and varying impedance of impedance elements connected between the output terminals and a center-tap terminal of the isolator system until a mismatch at the output terminals is minimized.

Abstract: Embodiments of the present disclosure may provide a method of calibrating an isolator system. The method may comprise the steps of driving a common signal to a pair of input terminals of the isolator system; measuring differences in signals at output terminals of the isolator system; and varying impedance of impedance elements connected between the output terminals and a center-tap terminal of the isolator system until a mismatch at the output terminals is minimized.

Abstract: A calibration system is configured to remove in an f2 frequency domain the effects of a fluctuation ??(t) in the Larmor frequencies of a plurality of nuclear spins in a sample, from an NMR signal acquired from the sample during an acquisition time t2 of an NMR scan having an evolution time t1. In this way, the calibration system generates an f2-calibrated NMR signal. The calibration system is further configured to remove from the f2-calibrated NMR signal the effects of ??(t) in an f1 domain, thereby additionally calibrating the f2- calibrated NMR signal in the f1 domain.

Abstract: An integrated circuit is provided for use in conjunction with an external antenna. The integrated circuit includes a memory circuit, a pulse sequencer, an NMR transmitter circuit and an NMR receiver circuit. The memory circuit is configured to store user-defined parameter data pertaining to an excitation period and an acquisition period that are part of an NMR pulse sequence. The pulse sequencer and the NMR transmitter circuit are configured to cooperate to generate RF signals in accordance the user-defined parameter data stored in the memory circuit, wherein such RF signals are supplied to the external antenna for emitting excitation signals from the external antenna during the excitation period of the NMR pulse sequence. The NMR receiver circuit is configured to receive electrical signals generated by the external antenna during the acquisition period of the NMR pulse sequence.