Abstract: An image scanning apparatus includes a converter to convert a signal generated by an image sensor scanning an image, into a digital signal, a processor to control the converter to convert the signal into the digital signal using a plurality of control signals communicable between the converter and the processor, and a reset circuit to generate a reset signal to reset the converter based on at least one control signal of the plurality of control signals.

Abstract: An image scanning apparatus includes a converter to convert a signal generated by an image sensor scanning an image, into a digital signal, a processor to control the converter to convert the signal into the digital signal using a plurality of control signals communicable between the converter and the processor, and a reset circuit to generate a reset signal to reset the converter based on at least one control signal of the plurality of control signals.

Abstract: An image scanning apparatus is provided. The image scanning apparatus includes an image sensor configured to scan image information of a manuscript, a converter configured to convert a signal scanned by the image sensor into a digital signal, a processor configured to control the converter by using a plurality of control signals and perform image-processing with respect to the signal converted into the digital signal, and a reset circuit unit configured to generate a reset signal by using the plurality of control signals and provide the converter with the generated reset signal.

Abstract: An image scanning apparatus is provided. The image scanning apparatus includes an image sensor configured to scan image information of a manuscript, a converter configured to convert a signal scanned by the image sensor into a digital signal, a processor configured to control the converter by using a plurality of control signals and perform image-processing with respect to the signal converted into the digital signal, and a reset circuit unit configured to generate a reset signal by using the plurality of control signals and provide the converter with the generated reset signal.

Abstract: An image forming apparatus includes a scanner configured to acquire scan data by scanning a scan target, an electrostatic discharge (ESD) detector configured to detect an ESD when the scan data is acquired, and a data processor configured to process the scan data acquired when the ESD is detected according to an operation state of the scanner.

Abstract: An electronic apparatus includes a user interface to receive an input selecting a plurality of circuit devices, a storage to store electrical current information and a Scattering parameter regarding input/output ports of the plurality of circuit devices, respectively, a calculator to calculate impedance per number of de-coupling capacitors based on the stared S-parameters and to calculate an accumulated noise value per number of the decoupling capacitors based on the calculated impedance and the electrical current information, and a controller to determine a number of the de-coupling capacitors based on the calculated accumulated noise values and to control the user interface to display the determined number of the de-coupling capacitors.

Abstract: An image forming apparatus includes a scanner configured to acquire scan data by scanning a scan target, an electrostatic discharge (ESD) detector configured to detect an ESD when the scan data is acquired, and a data processor configured to process the scan data acquired when the ESD is detected according to an operation state of the scanner.

Abstract: An electronic apparatus may include a circuit board, a processor disposed on an upper surface of the circuit board, and a memory disposed on a lower surface of the circuit board, such that the lower surface of the circuit board where the processor is arranged overlaps an area corresponding to where the memory is disposed.

Abstract: An electronic apparatus may include a circuit board, a processor disposed on an upper surface of the circuit board, and a memory disposed on a lower surface of the circuit board, such that the lower surface of the circuit board where the processor is arranged overlaps an area corresponding to where the memory is disposed.

Abstract: An electronic apparatus may include a circuit board, a processor disposed on an upper surface of the circuit board, and a memory disposed on a lower surface of the circuit board, such that the lower surface of the circuit board where the processor is arranged overlaps an area corresponding to where the memory is disposed.

Abstract: A quad flat package (QFP) includes a semiconductor chip, a paddle to support the semiconductor chip, a molding portion to surround the semiconductor chip, a plurality of leads formed on four sides of the molding portion, and a plurality of bonding wires to electrically connect the plurality of leads to the semiconductor chip, wherein the paddle is exposed to outside from at least one corner of a lower surface of the molding portion.