Patents by Inventor Dong-Yoon Seo
Dong-Yoon Seo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11969397Abstract: The present invention relates to a composition for preventing or treating transplantation rejection or a transplantation rejection disease, comprising a novel compound and a calcineurin inhibitor. A co-administration of the present invention 1) reduces the activity of pathogenic Th1 cells or Th17 cells, 2) increases the activity of Treg cells, 3) has an inhibitory effect against side effects, such as tissue damage, occurring in the sole administration thereof, 4) inhibits various pathogenic pathways, 5) inhibits the cell death of inflammatory cells, and 6) increases the activity of mitochondria, in an in vivo or in vitro allogenic model, a transplantation rejection disease model, a skin transplantation model, and a liver-transplanted patient, and thus inhibits transplantation rejection along with mitigating side effects possibly occurring in the administration of a conventional immunosuppressant alone.Type: GrantFiled: November 7, 2019Date of Patent: April 30, 2024Assignee: THE CATHOLIC UNIVERSITY OF KOREA INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Mi-La Cho, Dong-Yun Shin, Jong-Young Choi, Chul-Woo Yang, Sung-Hwan Park, Seon-Yeong Lee, Min-Jung Park, Joo-Yeon Jhun, Se-Young Kim, Hyeon-Beom Seo, Jae-Yoon Ryu, Keun-Hyung Cho
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Patent number: 11949881Abstract: The present invention discloses an encoding apparatus using a Discrete Cosine Transform (DCT) scanning, which includes a mode selection means for selecting an optimal mode for intra prediction; an intra prediction means for performing intra prediction onto video inputted based on the mode selected in the mode selection means; a DCT and quantization means for performing DCT and quantization onto residual coefficients of a block outputted from the intra prediction means; and an entropy encoding means for performing entropy encoding onto DCT coefficients acquired from the DCT and quantization by using a scanning mode decided based on pixel similarity of the residual coefficients.Type: GrantFiled: April 1, 2021Date of Patent: April 2, 2024Assignees: Electronics and Telecommunications Research Institute, Kwangwoon University Research Institute for Industry Cooperation, Industry-Academia Cooperation Group of Sejong UniversityInventors: Se-Yoon Jeong, Hae-Chul Choi, Jeong-Il Seo, Seung-Kwon Beack, In-Seon Jang, Jae-Gon Kim, Kyung-Ae Moon, Dae-Young Jang, Jin-Woo Hong, Jin-Woong Kim, Yung-Lyul Lee, Dong-Gyu Sim, Seoung-Jun Oh, Chang-Beom Ahn, Dae-Yeon Kim, Dong-Kyun Kim
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Publication number: 20240075853Abstract: An apparatus of tilting a seat cushion of a vehicle, includes a tilting motor, a pinion gear, a sector gear, and a tilting link which perform the tilting operation of the seat cushion and exert a binding force in a tilted state of the seat cushion and are provided to be connected to both of one side and the other side of a seat cushion frame, and has two sector gears positioned on left and right sides and connected to each other by a connection bar so that, by strengthening a binding force of the front portion of the seat cushion, it is possible to secure the safety of passengers in the event of a collision.Type: ApplicationFiled: April 13, 2023Publication date: March 7, 2024Applicants: Hyundai Motor Company, Kia Corporation, DAS CO., LTD, Faurecia Korea, Ltd., Hyundai Transys Inc.Inventors: Sang Soo LEE, Mu Young KIM, Sang Hark LEE, Ho Suk JUNG, Sang Do PARK, Chan Ho JUNG, Dong Hoon LEE, Hea Yoon KANG, Deok Soo LIM, Seung Pil JANG, Seon Ho KIM, Jong Seok YUN, Hyo Jin KIM, Dong Gyu SHIN, Jin Ho SEO, Young Jun KIM, Taek Jun NAM
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Patent number: 10887980Abstract: A coupled via structure includes a plate via penetrating through an board body and having first and second plates spaced apart from each other by a first gap distance, a contact pad connected to the plate via on a surface of the board body and having first and second contacts connected to the first and second plates, respectively, and a connection line connected to the contact pad on the surface of the board body and having first and second lines connected to the first and second contacts, respectively, and spaced apart from the first line by a second gap distance. Accordingly, the deviation of the characteristic impedance is reduced (or, alternatively, minimized) between the coupled via structure and the coupled signal line.Type: GrantFiled: February 11, 2020Date of Patent: January 5, 2021Assignees: SAMSUNG ELECTRONICS CO., LTD., RESEARCH & BUSINESS FOUNDATION SUNKYUNKWAN UNIVERSITYInventors: Dong-Yoon Seo, Jea-Eun Lee, WanSoo Nah
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Publication number: 20200178386Abstract: A coupled via structure includes a plate via penetrating through an board body and having first and second plates spaced apart from each other by a first gap distance, a contact pad connected to the plate via on a surface of the board body and having first and second contacts connected to the first and second plates, respectively, and a connection line connected to the contact pad on the surface of the board body and having first and second lines connected to the first and second contacts, respectively, and spaced apart from the first line by a second gap distance. Accordingly, the deviation of the characteristic impedance is reduced (or, alternatively, minimized) between the coupled via structure and the coupled signal line.Type: ApplicationFiled: February 11, 2020Publication date: June 4, 2020Applicants: Samsung Electronics Co., Ltd., RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITYInventors: Dong-Yoon SEO, Jea-Eun LEE, WanSoo NAH
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Patent number: 10561013Abstract: A coupled via structure includes a plate via penetrating through an board body and having first and second plates spaced apart from each other by a first gap distance, a contact pad connected to the plate via on a surface of the board body and having first and second contacts connected to the first and second plates, respectively, and a connection line connected to the contact pad on the surface of the board body and having first and second lines connected to the first and second contacts, respectively, and spaced apart from the first line by a second gap distance. Accordingly, the deviation of the characteristic impedance is reduced (or, alternatively, minimized) between the coupled via structure and the coupled signal line.Type: GrantFiled: September 14, 2018Date of Patent: February 11, 2020Assignees: Samsung Electronics Co., Ltd., Research & Business Foundation Sungkyunkwan UniversityInventors: Dong-Yoon Seo, Jea-Eun Lee, Wansoo Nah
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Publication number: 20190191547Abstract: A coupled via structure includes a plate via penetrating through an board body and having first and second plates spaced apart from each other by a first gap distance, a contact pad connected to the plate via on a surface of the board body and having first and second contacts connected to the first and second plates, respectively, and a connection line connected to the contact pad on the surface of the board body and having first and second lines connected to the first and second contacts, respectively, and spaced apart from the first line by a second gap distance. Accordingly, the deviation of the characteristic impedance is reduced (or, alternatively, minimized) between the coupled via structure and the coupled signal line.Type: ApplicationFiled: September 14, 2018Publication date: June 20, 2019Applicants: Samsung Electronics Co., Ltd., Research & Business Foundation SUNGKYUNKWAN UNIVERSITYInventors: Dong-Yoon SEO, Jea-Eun LEE, Wansoo NAH
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Memory module, memory system including the same, and data storage system including the memory module
Patent number: 9754658Abstract: A memory module includes a first printed circuit board (PCB) which includes a first surface, a second surface, first taps formed on the first surface, and second taps formed on the second surface, a first buffer attached to the first PCB, and first memory devices attached to the first PCB, in which the first buffer is configured to transmit signals input through the first taps and the second taps to the first memory devices, and signals re-driven by the first buffer among the signals are transmitted to a second module through the second taps.Type: GrantFiled: January 19, 2016Date of Patent: September 5, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Do Hyung Kim, In Young Park, Dong Yoon Seo, Jong Hyun Seok, Young Ho Lee, Dong Min Jang -
MEMORY MODULE, MEMORY SYSTEM INCLUDING THE SAME, AND DATA STORAGE SYSTEM INCLUDING THE MEMORY MODULE
Publication number: 20160247552Abstract: A memory module includes a first printed circuit board (PCB) which includes a first surface, a second surface, first taps formed on the first surface, and second taps formed on the second surface, a first buffer attached to the first PCB, and first memory devices attached to the first PCB, in which the first buffer is configured to transmit signals input through the first taps and the second taps to the first memory devices, and signals re-driven by the first buffer among the signals are transmitted to a second module through the second taps.Type: ApplicationFiled: January 19, 2016Publication date: August 25, 2016Inventors: Do Hyung KIM, In Young PARK, Dong Yoon SEO, Jong Hyun SEOK, Young Ho LEE, Dong Min JANG -
Patent number: 8369099Abstract: Disclosed is an electronic device module including a module substrate having first and second electronic device pair portions. The first electronic device pair portion may include a first and a second contact pad area and a first via area between the first and second contact pad areas. The first electronic device pair portion may also include a first layer and a second layer. The first layer may include a plurality of first lines connecting a plurality of contact pads in the first contact pad area on one side of the module substrate to a plurality of vias. The second layer may include a plurality of second lines connecting a plurality of contact pads in the second contact pad area to a plurality of vias in the via area. The second layer may also include a plurality of third lines connecting the first and second electronic device pair portions.Type: GrantFiled: January 29, 2010Date of Patent: February 5, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Do Hyung Kim, Jung-Mo Yang, Hyun Jung Yoo, Dong-Yoon Seo, In-Young Park
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Publication number: 20100195300Abstract: Disclosed is an electronic device module including a module substrate having first and second electronic device pair portions. The first electronic device pair portion may include a first and a second contact pad area and a first via area between the first and second contact pad areas. The first electronic device pair portion may also include a first layer and a second layer. The first layer may include a plurality of first lines connecting a plurality of contact pads in the first contact pad area on one side of the module substrate to a plurality of vias. The second layer may include a plurality of second lines connecting a plurality of contact pads in the second contact pad area to a plurality of vias in the via area. The second layer may also include a plurality of third lines connecting the first and second electronic device pair portions.Type: ApplicationFiled: January 29, 2010Publication date: August 5, 2010Inventors: Do Hyung Kim, Jung-Mo Yang, Hyun Jung Yoo, Dong-Yoon Seo, In-Young Park
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Publication number: 20100078211Abstract: Provided is a module having a symmetric topology. The module may include a pair of diverging via bodies configured to receive complementary signals. The pair of diverging via bodies may be further configured to diverge the complementary signals in at least three pairs of diverged complementary signals. The module may further include at least three pairs of connecting via bodies configured to receive the at least three pairs of diverged complementary signals from the pair of diverging via bodies and configured to transmit the at least three pairs of diverged complementary signals to components.Type: ApplicationFiled: August 25, 2009Publication date: April 1, 2010Inventors: Dohyung Kim, Jung-Mo Yang, Hyunjung Yoo, Dong-Yoon Seo