Abstract: The present invention relates to a composition for preventing or treating transplantation rejection or a transplantation rejection disease, comprising a novel compound and a calcineurin inhibitor. A co-administration of the present invention 1) reduces the activity of pathogenic Th1 cells or Th17 cells, 2) increases the activity of Treg cells, 3) has an inhibitory effect against side effects, such as tissue damage, occurring in the sole administration thereof, 4) inhibits various pathogenic pathways, 5) inhibits the cell death of inflammatory cells, and 6) increases the activity of mitochondria, in an in vivo or in vitro allogenic model, a transplantation rejection disease model, a skin transplantation model, and a liver-transplanted patient, and thus inhibits transplantation rejection along with mitigating side effects possibly occurring in the administration of a conventional immunosuppressant alone.

Abstract: The present invention discloses an encoding apparatus using a Discrete Cosine Transform (DCT) scanning, which includes a mode selection means for selecting an optimal mode for intra prediction; an intra prediction means for performing intra prediction onto video inputted based on the mode selected in the mode selection means; a DCT and quantization means for performing DCT and quantization onto residual coefficients of a block outputted from the intra prediction means; and an entropy encoding means for performing entropy encoding onto DCT coefficients acquired from the DCT and quantization by using a scanning mode decided based on pixel similarity of the residual coefficients.

Abstract: Disclosed is a high voltage output device having a serial-parallel stack structure of capacitors. The high voltage output device includes a substrate includes a capacitor element and a pillar structure provided on an upper surface of the substrate. The substrate includes a first electrode and a second electrode, which have different potentials from each other. The capacitor element is connected to at least one of the first electrode and the second electrode.

Abstract: The present specification relates to a conductive structure body, a method for manufacturing the same, and an electrode and an electronic device including the conductive structure body.

Abstract: An apparatus of tilting a seat cushion of a vehicle, includes a tilting motor, a pinion gear, a sector gear, and a tilting link which perform the tilting operation of the seat cushion and exert a binding force in a tilted state of the seat cushion and are provided to be connected to both of one side and the other side of a seat cushion frame, and has two sector gears positioned on left and right sides and connected to each other by a connection bar so that, by strengthening a binding force of the front portion of the seat cushion, it is possible to secure the safety of passengers in the event of a collision.

Abstract: A memory system includes a memory device including plural memory blocks and a controller configured to perform garbage collection on a victim block among the plural memory blocks. The controller is further configured to stop the garbage collection in response to an interrupt and invalidate a valid data item, which is copied from the victim block to a target block during the garbage collection.

Abstract: Memory controller devices, memory systems, and operating methods for memory controller devices and memory systems are disclosed. In one aspect, a memory controller having improved wear leveling performance is disclosed. The memory controller may control a first memory area and a second memory area, and include a first software layer configured to control the first memory area based on first logical addresses, a second software layer configured to control the second memory area based on second logical addresses, and a logical address manager configured to compare a logical address received from a host with a reference address selected from among a plurality of logical addresses to be used by the host, and transmit the logical address received from the host to the first software layer or the second software layer according to a criterion selected from between a first criterion and a second criterion based on the comparison.

Abstract: A memory system includes a memory device including plural memory blocks and a controller configured to perform garbage collection on a victim block among the plural memory blocks. The controller is further configured to stop the garbage collection in response to an interrupt and invalidate a valid data item, which is copied from the victim block to a target block during the garbage collection.

Abstract: A memory controller includes a first flash translation layer (FTL) generating a physical address corresponding to a first type logical address received from a host on the basis of information about the first memory blocks, a second FTL generating a physical address corresponding to a second type logical address received from the host on the basis of information about the second memory blocks, and a memory control unit controlling the first memory area or the second memory area to perform an operation on the physical address corresponding to the first type logical address or the physical address corresponding to the second type logical address, wherein the first FTL provides the second FTL with block request information for requesting use of the second memory blocks, and generates the physical address corresponding to the first type logical address received from the host on the basis of block allocation information provided by the second FTL.

Abstract: Memory controller devices, memory systems, and operating methods for memory controller devices and memory systems are disclosed. In one aspect, a memory controller having improved wear leveling performance is disclosed. The memory controller may control a first memory area and a second memory area, and include a first software layer configured to control the first memory area based on first logical addresses, a second software layer configured to control the second memory area based on second logical addresses, and a logical address manager configured to compare a logical address received from a host with a reference address selected from among a plurality of logical addresses to be used by the host, and transmit the logical address received from the host to the first software layer or the second software layer according to a criterion selected from between a first criterion and a second criterion based on the comparison.

Abstract: A method of operating a storage device includes receiving a first logical address from a host, determining whether first metadata stored in a volatile memory of the storage device and associated with the first logical address is corrupted, processing the first metadata as an uncorrectable error when the first metadata is determined to be corrupted, providing an error message to the host indicating that an operation cannot be performed on data associated with the first logical address when the first metadata is processed as the uncorrectable error, after the providing of the error message, receiving a second logical address from the host, determining whether second metadata stored in the volatile memory and associated with the second logical address is corrupted, and performing an operation of accessing the non-volatile memory based on the second metadata, when the second metadata is not determined to be corrupted.

Abstract: A data storage device is provided. The data storage device a buffer configured to store a mapping table comprising physical block addresses (PBAs) corresponding to logical block addresses (LBAs), a non-volatile memory configured to store data; and a controller configured to control the buffer and the non-volatile. The controller is configured to read data stored at a first PBA of the non-volatile memory corresponding to a first LBA by referring to the mapping table when receiving a command to read data corresponding to the first LBA from outside of the data storage device, and, when a second LBA included in the data read from the non-volatile memory is different from the first LBA, retry reading, from the non-volatile memory, the data corresponding to the first LBA.

Abstract: A memory controller includes a first flash translation layer (FTL) generating a physical address corresponding to a first type logical address received from a host on the basis of information about the first memory blocks, a second FTL generating a physical address corresponding to a second type logical address received from the host on the basis of information about the second memory blocks, and a memory control unit controlling the first memory area or the second memory area to perform an operation on the physical address corresponding to the first type logical address or the physical address corresponding to the second type logical address, wherein the first FTL provides the second FTL with block request information for requesting use of the second memory blocks, and generates the physical address corresponding to the first type logical address received from the host on the basis of block allocation information provided by the second FTL.

Abstract: A method of operating a storage device includes receiving a first logical address from a host, determining whether first metadata stored in a volatile memory of the storage device and associated with the first logical address is corrupted, processing the first metadata as an uncorrectable error when the first metadata is determined to be corrupted, providing an error message to the host indicating that an operation cannot be performed on data associated with the first logical address when the first metadata is processed as the uncorrectable error, after the providing of the error message, receiving a second logical address from the host, determining whether second metadata stored in the volatile memory and associated with the second logical address is corrupted, and performing an operation of accessing the non-volatile memory based on the second metadata, when the second metadata is not determined to be corrupted.

Abstract: A method of operating a storage device includes receiving a first logical address from a host, determining whether first metadata stored in a volatile memory of the storage device and associated with the first logical address is corrupted, processing the first metadata as an uncorrectable error when the first metadata is determined to be corrupted, providing an error message to the host indicating that an operation cannot be performed on data associated with the first logical address when the first metadata is processed as the uncorrectable error, after the providing of the error message, receiving a second logical address from the host, determining whether second metadata stored in the volatile memory and associated with the second logical address is corrupted, and performing an operation of accessing the non-volatile memory based on the second metadata, when the second metadata is not determined to be corrupted.

Abstract: A method of operating a non-volatile memory system, the method comprising: receiving an access request from a host; generating internal requests by processing the access request by a first central processing unit (CPU) according to a first mapping unit having a first size; and accessing a memory by processing the internal requests by a second CPU according to a second mapping unit having a second size; wherein the first size is different from the second size.

Abstract: A method of operating a storage device managing a multi-namespace includes storing first mapping information including a mapping between a first logical address space and a first physical address space to a mapping table, in response to a request to create a first namespace, the first logical address space being allocated to the first namespace, and storing second mapping information including a mapping between a second logical address space and a second physical address space to the mapping table, in response to a request to create a second namespace, the second logical address space being allocated to the second namespace and being contiguous to the first logical address space.

Abstract: A data storage device is provided. The data storage device a buffer configured to store a mapping table comprising physical block addresses (PBAs) corresponding to logical block addresses (LBAs), a non-volatile memory configured to store data; and a controller configured to control the buffer and the non-volatile. The controller is configured to read data stored at a first PBA of the non-volatile memory corresponding to a first LBA by referring to the mapping table when receiving a command to read data corresponding to the first LBA from outside of the data storage device, and, when a second LBA included in the data read from the non-volatile memory is different from the first LBA, retry reading, from the non-volatile memory, the data corresponding to the first LBA.

Abstract: A method of operating a storage controller, for controlling a garbage collection operation so that blocks included in a non-volatile memory satisfy reuse constraints, includes determining whether the number of free blocks among the blocks is smaller than a first reference value for triggering a garbage collection operation and performing the garbage collection operation on the blocks until the number of free blocks is equal to a second reference value larger than the first reference value according to a result of the determination.

Abstract: A method of operating a storage device includes receiving a first logical address from a host, determining whether first metadata stored in a volatile memory of the storage device and associated with the first logical address is corrupted, processing the first metadata as an uncorrectable error when the first metadata is determined to be corrupted, providing an error message to the host indicating that an operation cannot be performed on data associated with the first logical address when the first metadata is processed as the uncorrectable error, after the providing of the error message, receiving a second logical address from the host, determining whether second metadata stored in the volatile memory and associated with the second logical address is corrupted, and performing an operation of accessing the non-volatile memory based on the second metadata, when the second metadata is not determined to be corrupted.