Patents by Inventor Dongfang FENG

Dongfang FENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240119897
    Abstract: A pixel circuit and a driving method therefor and a display panel are provided. The pixel circuit includes a driving circuit, a data writing circuit, a storage circuit, and a first reset circuit; the driving circuit includes a control terminal, a first terminal, and a second terminal, and is configured to control a driving current flowing through the first terminal and the second terminal for driving a light-emitting element to emit light; the data write circuit is configured to write a data signal into the control terminal of the driving circuit; the storage circuit is configured to store the data signal; the first reset circuit is configured to apply a first initialization voltage to the control terminal of the driving circuit; the driving circuit and the data write circuit each include an N-type thin film transistor; and the first reset circuit includes an N-type oxide thin film transistor.
    Type: Application
    Filed: July 5, 2022
    Publication date: April 11, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Zhenhua Zhang, Dongfang Yang, Xilei Cao, Xueguang Hao, Lang Liu, Jingyi Feng, Changlong Yuan, Xiaoxin Li, Li Zhu
  • Patent number: 9433092
    Abstract: A layout method for a printed circuit board, comprising: defining a layout area on the printed circuit board; disposing at least one padstack on the layout area; disposing a welding material area on the padstack to partially cover the padstack and be located at one end of the padstack; disposing a blocking area on the layout area, wherein the blocking area comprises an opening to expose the padstack; and forming a wiring, wherein the wiring is connected with the padstack and the welding material area through the opening without overlapping the blocking area. The layout method for a printed circuit board and the printed circuit board may avoid that the outlet of the wiring is formed through the side of the welding material area to leave a blank area on the padstack.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: August 30, 2016
    Assignee: EverDisplay Optronics (Shanghai) Limited
    Inventor: Dongfang Feng
  • Publication number: 20160205777
    Abstract: A layout method for a printed circuit board, comprising: defining a layout area on the printed circuit board; disposing at least one padstack on the layout area; disposing a welding material area on the padstack to partially cover the padstack and be located at one end of the padstack; disposing a blocking area on the layout area, wherein the blocking area comprises an opening to expose the padstack; and forming a wiring, wherein the wiring is connected with the padstack and the welding material area through the opening without overlapping the blocking area. The layout method for a printed circuit board and the printed circuit board may avoid that the outlet of the wiring is formed through the side of the welding material area to leave a blank area on the padstack.
    Type: Application
    Filed: February 12, 2015
    Publication date: July 14, 2016
    Inventor: Dongfang FENG