Patents by Inventor Donggyu HEO

Donggyu HEO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor memory device including work function adjusting layer in buried gate line and method of manufacturing the same
    Patent number: 11189618
    Abstract: Disclosed are a semiconductor memory device and a method of manufacturing the same. The semiconductor memory device includes a device isolation layer defining active regions of a substrate, and gate lines buried in the substrate and extending across the active regions. Each of the gate lines includes a conductive layer, a liner layer disposed between and separating the conductive layer and the substrate, and a first work function adjusting layer disposed on the conductive layer and the liner layer. The first work function adjusting layer includes a first work function adjusting material. A work function of the first work function adjusting layer is less than those of the conductive layer and the liner layer.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: November 30, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Namho Jeon, Jin-Seong Lee, Hyun-jung Lee, Dongsoo Woo, Donggyu Heo, Jaeho Hong
  • Semiconductor memory device including work function adjusting layer in buried gate line and method of manufacturing the same
    Patent number: 11152365
    Abstract: Disclosed are a semiconductor memory device and a method of manufacturing the same. The semiconductor memory device includes a device isolation layer defining active regions of a substrate, and gate lines buried in the substrate and extending across the active regions. Each of the gate lines includes a conductive layer, a liner layer disposed between and separating the conductive layer and the substrate, and a first work function adjusting layer disposed on the conductive layer and the liner layer. The first work function adjusting layer includes a first work function adjusting material. A work function of the first work function adjusting layer is less than those of the conductive layer and the liner layer.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: October 19, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Namho Jeon, Jin-Seong Lee, Hyun-jung Lee, Dongsoo Woo, Donggyu Heo, Jaeho Hong
  • SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20190115351
    Abstract: Disclosed are a semiconductor memory device and a method of manufacturing the same. The semiconductor memory device includes a device isolation layer defining active regions of a substrate, and gate lines buried in the substrate and extending across the active regions. Each of the gate lines includes a conductive layer, a liner layer disposed between and separating the conductive layer and the substrate, and a first work function adjusting layer disposed on the conductive layer and the liner layer. The first work function adjusting layer includes a first work function adjusting material. A work function of the first work function adjusting layer is less than those of the conductive layer and the liner layer.
    Type: Application
    Filed: April 30, 2018
    Publication date: April 18, 2019
    Inventors: NAMHO JEON, Jin-Seong LEE, Hyun-jung LEE, Dongsoo Woo, Donggyu HEO, Jaeho Hong