Abstract: A memory cell comprises channel material, charge-passage material, programmable material, a charge-blocking region, and a control gate. The programmable material comprises at least two regions comprising SiNx having a region comprising SiOy therebetween, where “x” is 0.5 to 3.0 and “y” is 1.0 to 3.0. Methods are disclosed.

Abstract: The present disclosure relates to a molecular marker of the IGF2BP1 gene related to a chicken body size trait and the use thereof, and a genetic improvement method. In the present disclosure, it is found by means of gene association analysis that a deletion mutation in a promoter region of the IGF2BP1 gene of chicken is significantly associated with the chicken body size trait.

Abstract: A memory cell comprises channel material, charge-passage material, programmable material, a charge-blocking region, and a control gate. The programmable material comprises at least two regions comprising SiNx having a region comprising SiOy therebetween, where “x” is 0.5 to 3.0 and “y” is 1.0 to 3.0. Methods are disclosed.

Abstract: A memory cell comprises channel material, charge-passage material, programmable material, a charge-blocking region, and a control gate. The programmable material comprises at least two regions comprising SiNx having a region comprising SiOy therebetween, where “x” is 0.5 to 3.0 and “y” is 1.0 to 3.0. Methods are disclosed.

Abstract: Provided are a shift register, a gate drive circuit, a display panel and a driving method. The shift register includes a first output module, a second output module, a first node, a second node, a first power supply signal terminal, a first clock signal terminal and a scan output terminal. The first output module and the second output module are electrically connected to the scan output terminal. The first output module is further electrically connected to the first power supply signal terminal and the first node. The first node is configured to control a conduction state of the first output module. The second output module is further electrically connected to the first clock signal terminal and the second node. The second node is configured to control a conduction state of the second output module. There is no capacitor in the first output module and/or the second output module.

Abstract: A display substrate, a display module and a control method are provided in the present disclosure. The display substrate includes a first substrate and a second substrate. The first substrate includes a base substrate, conductive pads, a first switch unit group electrically connected to the conductive pads and signal wires, and a second switch unit group electrically connected to the conductive pads. The display substrate includes a substrate detection phase where all second switch units are cutoff, all first switch units are conducting, and an external detection device input a first detection signal to the substrate through the conductive pads and all first switch units. When the first switch unit group is conducting, the conductive pads are used for substrate detection, and when the second switch unit group is cutoff, the conductive pads in a same pad region are connected each other to be multiplexed as electrostatic conductive pads.

Abstract: A display substrate, a display module and a control method are provided in the present disclosure. The display substrate includes a first substrate and a second substrate. The first substrate includes a base substrate, conductive pads, a first switch unit group electrically connected to the conductive pads and signal wires, and a second switch unit group electrically connected to the conductive pads. The display substrate includes a substrate detection phase where all second switch units are cutoff, all first switch units are conducting, and an external detection device input a first detection signal to the substrate through the conductive pads and all first switch units. When the first switch unit group is conducting, the conductive pads are used for substrate detection, and when the second switch unit group is cutoff, the conductive pads in a same pad region are connected each other to be multiplexed as electrostatic conductive pads.

Abstract: Disclosed are a display panel and a display device. In some embodiments of the disclosure, opening support structures are arranged between a first substrate and a second substrate in at least a sub-area corresponding to the largest one of respective first spacings, that is, the opening support structures are arranged in at least the sub-area in which connection segments of touch signal lines are the most sparsely arranged.

Abstract: Provided are a shift register, a gate drive circuit, a display panel and a driving method. The shift register includes a first output module, a second output module, a first node, a second node, a first power supply signal terminal, a first clock signal terminal and a scan output terminal. The first output module and the second output module are electrically connected to the scan output terminal. The first output module is further electrically connected to the first power supply signal terminal and the first node. The first node is configured to control a conduction state of the first output module. The second output module is further electrically connected to the first clock signal terminal and the second node. The second node is configured to control a conduction state of the second output module. There is no capacitor in the first output module and/or the second output module.

Abstract: A display panel and a display device are provided. The display panel includes multiple pixel units. In each of the pixel units, the area of an opening region of at least one sub-pixel is different from the area of an opening region of other sub-pixels. There is an adjustment capacitance between the drain of the thin film transistor and/or the first electrode in each sub-pixel and the scan line corresponding to the sub-pixel, and the sub-pixel having a smaller area of the opening region corresponds to a smaller value of the adjustment capacitance. By adjusting the value of the adjustment capacitance corresponding to the sub-pixels with different areas of opening regions, the optimal Vcom of all the sub-pixels is the same, so that all the sub-pixels operate under the same optimal Vcom.

Abstract: The disclosure provides a display panel and a method for driving the display panel. The display panel includes a display area and a peripheral area surrounding the display area, and the display area includes one first display area and at least one second display area. The design according to embodiments of the disclosure release enough space occupied by the peripheral area at one side of the at least one second display area far away from the first display area, thus increasing display area in desired direction and a screen-to-total face ratio.

Abstract: A display panel, manufacturing method and display device are provided. The display panel includes: multiple pixel units arranged in an array, each including first sub-pixel and white sub-pixel; and color-film substrate. The color-substrate includes basis substrate and color resist layer formed on the basis substrate, wherein the color resist layer at least includes first color resist in first color resist region and compensating color resist in second color resist region, first and second color resist regions respectively corresponding to first and second sub-pixels. The color-film substrate further includes photo spacer located on one side of color resist layer away from basis substrate, orthographic projection of photo spacer on a plane where display panel is located overlaps orthographic projection of first color resist on this plane, and orthographic projection of photo spacer on this plane overlaps orthographic projection of compensating color resist on this plane.

Abstract: Disclosed are a display panel and a display device. In some embodiments of the disclosure, opening support structures are arranged between a first substrate and a second substrate in at least a sub-area corresponding to the largest one of respective first spacings, that is, the opening support structures are arranged in at least the sub-area in which connection segments of touch signal lines are the most sparsely arranged.

Abstract: A display panel, manufacturing method and display device are provided. The display panel includes: multiple pixel units arranged in an array, each including first sub-pixel and white sub-pixel; and color-film substrate. The color-substrate includes basis substrate and color resist layer formed on the basis substrate, wherein the color resist layer at least includes first color resist in first color resist region and compensating color resist in second color resist region, first and second color resist regions respectively corresponding to first and second sub-pixels. The color-film substrate further includes photo spacer located on one side of color resist layer away from basis substrate, orthographic projection of photo spacer on a plane where display panel is located overlaps orthographic projection of first color resist on this plane, and orthographic projection of photo spacer on this plane overlaps orthographic projection of compensating color resist on this plane.

Abstract: A display panel and a display device are provided. The display panel includes multiple pixel units. In each of the pixel units, the area of an opening region of at least one sub-pixel is different from the area of an opening region of other sub-pixels. There is an adjustment capacitance between the drain of the thin film transistor and/or the first electrode in each sub-pixel and the scan line corresponding to the sub-pixel, and the sub-pixel having a smaller area of the opening region corresponds to a smaller value of the adjustment capacitance. By adjusting the value of the adjustment capacitance corresponding to the sub-pixels with different areas of opening regions, the optimal Vcom of all the sub-pixels is the same, so that all the sub-pixels operate under the same optimal Vcom.

Abstract: The disclosure provides a display panel and a method for driving the display panel. The display panel includes a display area and a peripheral area surrounding the display area, and the display area includes one first display area and at least one second display area. The design according to embodiments of the disclosure release enough space occupied by the peripheral area at one side of the at least one second display area far away from the first display area, thus increasing display area in desired direction and a screen-to-total face ratio.