Abstract: A semiconductor component includes a substrate; a polysilicon layer formed on the substrate, and the polysilicon layer includes a source, a channel, and a drain, and the source and the drain are formed at two sides of the polysilicon layer, and the channel is formed between the source and the drain; a gate insulating layer formed on the polysilicon layer; a gate formed on the gate insulating layer and formed directly above the channel; an interlayer dielectric layer formed above the gate and covering the gate and implanted with hydrogen atoms by ion implantation and rapidly annealed at high temperature to form a hydrogenated interlayer dielectric layer; a metal conducting wire passing through an upper surface of the hydrogenated interlayer dielectric layer and contacting with the source or the drain; and a passivation layer covering the hydrogenated interlayer dielectric layer. A method of fabricating the semiconductor component is also provided.

Abstract: The present invention discloses a preparation method of a low temperature polysilicon thin film transistor including: successively forming a polysilicon active layer and a gate insulating layer covering the active layer on a base substrate; implanting nitrogen ions on a surface of the polysilicon active layer facing the gate insulating layer by an ion implantation process to form an ion implantation layer; and recrystallizing the ion implantation layer by a high temperature annealing process to form a silicon nitride spacing layer between the polysilicon active layer and the gate insulating layer.

Abstract: The present invention discloses a preparation method of a low temperature polysilicon thin film transistor including: successively forming a polysilicon active layer and a gate insulating layer covering the active layer on a base substrate; implanting nitrogen ions on a surface of the polysilicon active layer facing the gate insulating layer by an ion implantation process to form an ion implantation layer; and recrystallizing the ion implantation layer by a high temperature annealing process to form a silicon nitride spacing layer between the polysilicon active layer and the gate insulating layer.