Patents by Inventor Dongjiang Yang

Dongjiang Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260106536
    Abstract: A method for suppressing a direct current-link (DC-Link) capacitor current ripple (CCR) of a coupled three-level inverter (TLI), including: dividing space vector diagram regions of coupled TLI based on value range of virtual voltage vector duty cycle distribution factor; determining, based on amplitude, phase angle, and three-phase output current of reference voltage vector, sector and region in which reference voltage vector is located; then selecting nearest one virtual voltage vector and two basic voltage vectors, to calculate duty cycles thereof, respectively; designing a controller, updating duty cycle distribution factor of small vector based on sector and region in which reference voltage vector is located, set value of voltage difference across DC-Link capacitors, and actual value of voltage difference across DC-Link capacitors; and designing switching sequence based on updated small vector duty cycle and sector and region in which reference voltage vector is located.
    Type: Application
    Filed: September 2, 2025
    Publication date: April 16, 2026
    Inventors: Xiaoyan LI, Changwei QIN, Chengdong LI, Zhiyuan CHU, Chuanjing HOU, Hongchao BAI, Dongjiang YANG, Dingguo AN, Lei YANG
  • Patent number: 12418245
    Abstract: The present invention provides a method for cooperatively suppressing a common-mode voltage and current harmonics of coupled three-level inverters, comprising: based on amplitude and phase angle of reference voltage vector, determining sector and region in which the reference voltage vector is located; selecting four basic voltage vectors with low common-mode voltage amplitudes to synthesize the reference voltage vector; writing volt-second balance equation based on selected basic voltage vectors, and calculating duty cycles thereof; and based on sector and region in which reference voltage vector is located, set value of voltage difference across capacitors on direct current side, and actual value of voltage difference across capacitors on direct current side, (1) updating duty cycles of basic voltage vectors, to realize separate control of capacitor voltage; and (2) designing and converting switching sequence into PWM drive signal of power switch, to control the coupled three-level inverter to operate.
    Type: Grant
    Filed: April 25, 2025
    Date of Patent: September 16, 2025
    Assignee: SHANDONG JIANZHU UNIVERSITY
    Inventors: Xiaoyan Li, Changwei Qin, Chengdong Li, Han Xu, Zhiyuan Chu, Chuanjing Hou, Hongchao Bai, Dongjiang Yang, Lei Yang