Abstract: An apparatus includes a bandgap voltage reference configured to generate a current reference for controlling a plurality of light emitting diode channels, a plurality of MOSFET devices connected in parallel and coupled between a cathode of a light emitting diode channel and ground, wherein the plurality of MOSFET devices is configured to control a current flowing through the light emitting diode channel, and a control circuit configured to generate gate drive signals for the plurality of MOSFET devices, wherein the gate drive signals are configured to adjust the current flowing through the light emitting diode channel based on a predetermined color and a predetermined brightness level of the light emitting diode channel.

Abstract: An apparatus includes a plurality of MOSFET device groups connected in parallel, wherein a first common node of the plurality of MOSFET device groups is coupled to a cathode of a light emitting diode channel of a plurality of light emitting diode channels, and a second common node of the plurality of MOSFET device groups is connected to ground, and a control circuit configured to generate gate drive signals for the plurality of MOSFET device groups, wherein the gate drive signals are configured to adjust a current flowing through the light emitting diode channel based on a predetermined color and a predetermined brightness level of the light emitting diode channel, and under different duty cycles, the control circuit is configured to control the current flowing through the light emitting diode channel to be proportional to a corresponding duty cycle.

Abstract: A distributed acoustic sensor is positioned within a wellbore of a geologic formation. Seismic waves are detected using the distributed acoustic sensor. A raw seismic profile is generated based on the detected seismic waves. Resonant noise is identified and reduced in seismic data associated with the raw seismic profile.

Abstract: A distributed acoustic sensor is positioned within a wellbore of a geologic formation. Seismic waves are detected using the distributed acoustic sensor. A raw seismic profile is generated based on the detected seismic waves. Resonant noise is identified and reduced in seismic data associated with the raw seismic profile.

Abstract: A controller for controlling a plurality of serially-connected LED strings includes a reference voltage generator configured to generate a plurality of reference voltages. The reference voltage generator is further configured to vary the plurality of reference voltages based on a sampled voltage signal. The sampled voltage signal can include one or both of a peak voltage of the rectified input AC voltage and a peak voltage of an LED diode forward voltage Vf. The controller further includes a plurality of linear regulators, each linear regulator coupled between a cathode of a corresponding LED string and a common current sense node, and each linear regulator is configured to regulate a current through a corresponding LED string according to a corresponding reference voltage.

Abstract: A controller for controlling a plurality of serially-connected LED strings includes a reference voltage generator configured to generate a plurality of reference voltages. The reference voltage generator is further configured to vary the plurality of reference voltages based on a sampled voltage signal. The sampled voltage signal can include one or both of a peak voltage of the rectified input AC voltage and a peak voltage of an LED diode forward voltage Vf. The controller further includes a plurality of linear regulators, each linear regulator coupled between a cathode of a corresponding LED string and a common current sense node, and each linear regulator is configured to regulate a current through a corresponding LED string according to a corresponding reference voltage.

Abstract: A system for attenuating coherent noise from seismic data comprises one or more sensors configured to sense waves generated by a seismic source and a coherent noise attenuation module communicably coupled to the one or more sensors and comprising a processor and memory. The coherent noise attenuation module is operable to receive a plurality of traces of seismic data from the one or more sensors and apply a first transformation to the plurality of traces, identify one or more outlier waveforms in the transformed traces, attenuate the identified outlier waveforms, and apply a second transformation to the plurality of traces that is the inverse of the first transformation.

Abstract: A controller for controlling a plurality of serially-connected LED strings includes a reference voltage generator configured to generate a plurality of reference voltages. The reference voltage generator is further configured to vary the plurality of reference voltages based on a sampled voltage signal. The sampled voltage signal can include one or both of a peak voltage of the rectified input AC voltage and a peak voltage of an LED diode forward voltage Vf. The controller further includes a plurality of linear regulators, each linear regulator coupled between a cathode of a corresponding LED string and a common current sense node, and each linear regulator is configured to regulate a current through a corresponding LED string according to a corresponding reference voltage.

Abstract: A system for attenuating coherent noise from seismic data comprises one or more sensors configured to sense waves generated by a seismic source and a coherent noise attenuation module communicably coupled to the one or more sensors and comprising a processor and memory. The coherent noise attenuation module is operable to receive a plurality of traces of seismic data from the one or more sensors and apply a first transformation to the plurality of traces, identify one or more outlier waveforms in the transformed traces, attenuate the identified outlier waveforms, and apply a second transformation to the plurality of traces that is the inverse of the first transformation.

Abstract: A reverse current sensing (RCS) regulator system and method is provided. One embodiment of the invention includes a RCS regulator system. The system comprises a RCS comparator that monitors a drain voltage of a LS FET and is configured to switch states at a zero crossing point to provide an indication of the start of a reverse current condition. The system further comprises a RCS evaluator that measures a drain voltage of the LS FET upon receiving an indication that the LS FET has been turned off by the driver logic circuit and adjusts an offset to the RCS comparator to adjust the trip point of the RCS comparator relative to the drain voltage if the measured drain voltage falls outside a predetermined threshold.

Abstract: A switching regulator (20) including an on-chip power output function (24) and also an interface (26) to which off-chip power output devices (42PU, 42PD) may be connected is disclosed. The switching regulator (20) includes an output enable circuit (25, 125) that senses the presence of external components at one of the terminals (T_PD, TL) of the on-chip power output function (24) or of the interface (26) to determine which of the output functions to enable. In one disclosed embodiment, the output enable circuit (25) detects whether an off-chip power transistor (T_PD) is connected at the interface (26), by charging a passive circuit (R1, C1) and determining whether the charging time constant is affected by the gate capacitance of the external transistor (42PD).

Abstract: One embodiment of the invention includes a hysteretic power regulator system. The system includes a switching stage configured to periodically couple an input voltage to an inductor in response to a control signal to generate an output voltage. The system also includes a hysteretic control stage configured to generate the control signal based on a comparison of a feedback voltage associated with the output voltage and a predetermined reference voltage. The system also includes a feed-forward stage configured to generate a feed-forward ramp voltage in response to the control signal. The feed-forward ramp voltage can be added to the feedback voltage to set a frequency of the control signal. The system further includes a compensation stage configured to cancel a DC error associated with the feed-forward ramp voltage relative to the feedback voltage to substantially mitigate errors associated with the output voltage.

Abstract: A reverse current sensing (RCS) regulator system and method is provided. One embodiment of the invention includes a RCS regulator system. The system comprises a RCS comparator that monitors a drain voltage of a LS FET and is configured to switch states at a zero crossing point to provide an indication of the start of a reverse current condition. The system further comprises a RCS evaluator that measures a drain voltage of the LS FET upon receiving an indication that the LS FET has been turned off by the driver logic circuit and adjusts an offset to the RCS comparator to adjust the trip point of the RCS comparator relative to the drain voltage if the measured drain voltage falls outside a predetermined threshold.

Abstract: One embodiment of the invention includes a hysteretic power regulator system. The system includes a switching stage configured to periodically couple an input voltage to an inductor in response to a control signal to generate an output voltage. The system also includes a hysteretic control stage configured to generate the control signal based on a comparison of a feedback voltage associated with the output voltage and a predetermined reference voltage. The system also includes a feed-forward stage configured to generate a feed-forward ramp voltage in response to the control signal. The feed-forward ramp voltage can be added to the feedback voltage to set a frequency of the control signal. The system further includes a compensation stage configured to cancel a DC error associated with the feed-forward ramp voltage relative to the feedback voltage to substantially mitigate errors associated with the output voltage.

Abstract: A switching regulator (20) including an on-chip power output function (24) and also an interface (26) to which off-chip power output devices (42PU, 42PD) may be connected is disclosed. The switching regulator (20) includes an output enable circuit (25, 125) that senses the presence of external components at one of the terminals (T_PD, TL) of the on-chip power output function (24) or of the interface (26) to determine which of the output functions to enable. In one disclosed embodiment, the output enable circuit (25) detects whether an off-chip power transistor (T_PD) is connected at the interface (26), by charging a passive circuit (R1, C1) and determining whether the charging time constant is affected by the gate capacitance of the external transistor (42PD).