Abstract: A semiconductor memory device includes: a substrate including a first region and a second region, the first region includes a peripheral circuit and a first active region (FAR), and the second region includes memory cell blocks. The FAR includes a FAR first extension extending in a first direction, a FAR second extension extending in a second direction, and a FAR third extension extending in a third direction. The FAR first extension, the FAR second extension, and the FAR third extension form an angle greater than 90 degrees relative to one another. The device includes a first pass transistor circuit configured to transmit driving signals, and the first pass transistor circuit includes a FAR first gate structure on the FAR first extension, a FAR second gate structure on the FAR second extension, a FAR third gate structure on the FAR third extension, and a first shared source/drain.

Abstract: A radio frequency (RF) weak magnetic field detection sensor includes a ferromagnetic core, a pickup coil disposed to surround the ferromagnetic core, a substrate that includes an opening, a core pad connected to the ferromagnetic core and a coil pad connected to the pickup coil, and an insulating tube interposed between the ferromagnetic core and the pickup coil. The insulating tube includes a bobbin around which the pickup coil is wound, and a core hole formed to pass through the bobbin and configured to accommodate the ferromagnetic core.

Abstract: Provided is a computation method of a memory processor configured to perform an operation between a first vector including first elements and a second vector including second elements, the first elements including respective first bits and the second elements including respective second bits, the method performed by the memory processor including: applying, to single-bit operation gates, the respective first bits and the respective second bits; obtaining bit operation result sum values for the respective first and second elements based on bit operation results obtained using the single-bit operation gates; and obtaining an operation result of the first vector and the second vector based on the bit operation result sum value.

Abstract: A multi-bit accumulator including a plurality of 1-bit Wallace trees configured to perform an add operation on single-bit input data, a plurality of tristate buffers configured to output a result of the add operation of the 1-bit Wallace trees, according to an enable signal, and a shift-adder configured to perform an accumulation operation on the result of the add operation of the plurality of 1-bit Wallace trees by a shift operation based on a clock signal.

Abstract: A multi-bit accumulator includes 1-bit Wallace trees each configured to perform an add operation on single-bit input data, tristate logic circuits each configured to output a result of the add operation of the 1-bit Wallace trees according to an enable signal provided to the tristate logic circuits, and a shift-adder configured to perform an accumulation operation on the result of the add operation of the 1-bit Wallace trees by a shift operation based on a clock signal.

Abstract: An apparatus of tilting a seat cushion of a vehicle, includes a tilting motor, a pinion gear, a sector gear, and a tilting link which perform the tilting operation of the seat cushion and exert a binding force in a tilted state of the seat cushion and are provided to be connected to both of one side and the other side of a seat cushion frame, and has two sector gears positioned on left and right sides and connected to each other by a connection bar so that, by strengthening a binding force of the front portion of the seat cushion, it is possible to secure the safety of passengers in the event of a collision.

Abstract: An apparatus and method with in-memory computing (IMC) are provided. An in-memory computing (IMC) circuit includes a plurality of memory banks, each memory bank including a bit cell configured to store a weight value and an operator configured to receive an input value, the operator being connected to the bit cell such that the operator upon receiving the input value outputs a logic operation result between the input value and the weight value, and a logic gate configured to receive the logic operation result of each of the memory banks.

Abstract: An apparatus and method for transmitting and receiving magnetic field signals in a magnetic field communication system are provided. The apparatus includes a controller configured to generate a communication signal, matching units that are configured to receive the communication signal and that respectively correspond to different matching frequencies, and loop antennas that are connected to the matching units, respectively, and that are configured to convert communication signals according to the different matching frequencies into magnetic transmission signals in the form of magnetic field energy and to transmit the magnetic transmission signals.

Abstract: The energy storage system according to one embodiment comprises a first converter connected between the system and the DC distribution network, and converting an AC voltage of the system into a DC voltage and transmitting the DC voltage to the DC distribution network; a second converter connected to the DC distribution network and controlling the voltage of the DC distribution network; a battery connected to the second converter and of which the charging and discharging are controlled by the second converter; a third converter connected to the DC distribution network; and a first load connected to the third converter and of which the voltage is controlled by means of the third converter, wherein the first converter generates a power control instruction for controlling at least one of the battery and the first load on the basis of SOC information of the battery and power consumption information of the first load.

Abstract: Disclosed is an uninterruptible power supply system comprising an energy storage system (ESS). The uninterruptible power supply system comprises an ESS and is connected to a grid, and further comprises: a first converter for converting an alternating current voltage of the grid into a direct current voltage; a second converter connected in series to the first converter, for converting the direct current voltage outputted from the first converter into an alternating current voltage and transferring same to a load; the ESS comprising a battery connected to a node between the first and second converter, for performing charging and discharging; and a PLC for receiving the operation statuses of the first and second converters, and on the basis thereof, controlling the operation of the uninterruptible power supply system, wherein the PLC determines the operation mode of the ESS by using the received operation statuses of the first and second converters.

Abstract: Disclosed is an uninterruptible power supply system comprising an energy storage system (ESS). The uninterruptible power supply system comprises an ESS and is connected to a grid, and further comprises: a first converter for converting an alternating current voltage of the grid into a direct current voltage; a second converter connected in series to the first converter, for converting the direct current voltage outputted from the first converter into an alternating current voltage and transferring same to a load; the ESS comprising a battery connected to a node between the first and second converter, for performing charging and discharging; and a PLC for receiving the operation statuses of the first and second converters, and on the basis thereof, controlling the operation of the uninterruptible power supply system, wherein the PLC determines the operation mode of the ESS by using the received operation statuses of the first and second converters.

Abstract: The energy storage system according to one embodiment comprises a first converter connected between the system and the DC distribution network, and converting an AC voltage of the system into a DC voltage and transmitting the DC voltage to the DC distribution network; a second converter connected to the DC distribution network and controlling the voltage of the DC distribution network; a battery connected to the second converter and of which the charging and discharging are controlled by the second converter; a third converter connected to the DC distribution network; and a first load connected to the third converter and of which the voltage is controlled by means of the third converter, wherein the first converter generates a power control instruction for controlling at least one of the battery and the first load on the basis of SOC information of the battery and power consumption information of the first load.

Abstract: A photovoltaic inverter includes: an input unit to connected to a first terminal and a second terminal to which a positive (+) polarity or a negative (?) polarity of a photovoltaic module are connected; a switching device configured to control the first terminal and the second terminal connected to the input unit according to pre-set polarities of an inverter unit; a booster unit configured to boost a voltage of the photovoltaic module delivered form the input unit through the switching device; a capacitor configured to charge the voltage boosted by the booster unit; and an inverter unit configured to convert the voltage charged in the capacitor into an alternating current (AC) and provide the converted AC voltage for an electric power system.

Abstract: A photovoltaic inverter includes: an input unit to connected to a first terminal and a second terminal to which a positive (+) polarity or a negative (?) polarity of a photovoltaic module are connected; a switching device configured to control the first terminal and the second terminal connected to the input unit according to pre-set polarities of an inverter unit; a booster unit configured to boost a voltage of the photovoltaic module delivered form the input unit through the switching device; a capacitor configured to charge the voltage boosted by the booster unit; and an inverter unit configured to convert the voltage charged in the capacitor into an alternating current (AC) and provide the converted AC voltage for an electric power system.

Abstract: In an organic thin film transistor array panel includes a source electrode and a drain electrode having a double layer including a metal and a metal oxide. The organic thin film transistor array panel is formed through a lift-off process or by using a shadow mask. The thin film transistor array panel has excellent characteristics and reduced manufacturing process costs.