Abstract: An image sensor includes a chip structure including first and second regions. The chip structure further includes a substrate having a first surface, a second surface, and a recess portion, a plurality of photoelectric conversion devices included in the substrate, at least one conductive layer on a sidewall and a bottom surface of the recess portion and on the horizontal insulating layer in the second region, a first passivation layer on a side surface of the conductive layer in the recess portion and the conductive layer on the horizontal insulating layer, and a second passivation layer on side surface of the first passivation layer in the recess portion.

Abstract: An image sensor includes a dual vertical gate. The dual vertical gate includes two vertical extension portions that are spaced apart from each other in a first direction and vertically extend in a second direction perpendicular to the first direction into a substrate, and a connection portion that connects the two vertical extension portions to each other. An element isolation layer is disposed adjacent to a side surface of the vertical extension portion in the first direction. The two vertical extension portions are separated by a separation area that extends in the second direction, and a top surface of the separation area is lower than a top surface of the element isolation layer.

Abstract: An image sensor includes; a semiconductor substrate including a first surface and an opposing second surface, a pixel isolation structure in the semiconductor substrate and defining a pixel section, a photoelectric conversion region in the pixel section, a first device isolation layer on the pixel section and defining an active area on the first surface of the semiconductor substrate, a floating diffusion region in the active area and spaced apart from the photoelectric conversion region, a transfer gate electrode on the active area between the photoelectric conversion region and the floating diffusion region, and a second device isolation layer in the active area between the transfer gate electrode and the floating diffusion region.

Abstract: A computer-implemented method of identifying federations of manufacturing apps using House of Quality (HoQ) analysis includes receiving user request information comprising a plurality of desired functions and an importance value for each of the plurality of desired functions and generating a correlation matrix between the plurality of apps, wherein each element of the correlation matrix indicates a degree of correlation between a pair of apps. A relationship matrix is generated which comprises numerical values indicating relationships between a plurality of apps and the plurality of desired functions, wherein each column of relationship matrix is associated with an app and each row is associated with a desired function. Next, a weighted matrix is created by multiplying each row in the relationship matrix by the importance value corresponding to the desired function associated with the row.

Abstract: A computer-implemented method of identifying federations of manufacturing apps using House of Quality (HoQ) analysis includes receiving user request information comprising a plurality of desired functions and an importance value for each of the plurality of desired functions and generating a correlation matrix between the plurality of apps, wherein each element of the correlation matrix indicates a degree of correlation between a pair of apps. A relationship matrix is generated which comprises numerical values indicating relationships between a plurality of apps and the plurality of desired functions, wherein each column of relationship matrix is associated with an app and each row is associated with a desired function. Next, a weighted matrix is created by multiplying each row in the relationship matrix by the importance value corresponding to the desired function associated with the row.

Abstract: A device includes first patterns, second patterns, and a second sample pattern on a semiconductor substrate. The second patterns are horizontally spaced apart at an equal interval from the second sample pattern. The second sample pattern includes first and second sidewall facing each other, a first point on the first sidewall, and a second point on the second sidewall. The second sample pattern and the most adjacent first pattern in relation to the second sample pattern are spaced apart from each other at a first horizontal distance in a direction parallel to a line connecting the first point and the second point. The first horizontal distance is greater than a second horizontal distance in the direction between one second pattern of the second patterns and a most adjacent first pattern in relation to the one second pattern.