Patents by Inventor Dongna Shen

Dongna Shen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9972777
    Abstract: A method for etching a magnetic tunneling junction (MTJ) structure is described. A bottom electrode layer is provided on a substrate. A seed layer is deposited on the bottom electrode layer. The seed layer and bottom electrode layer are patterned. A dielectric layer is deposited over the patterned seed layer and bottom electrode layer and planarized wherein the seed layer is exposed. Thereafter, a stack of MTJ layers is deposited on the patterned seed layer comprising a pinned layer, a tunnel barrier layer, and a free layer. The MTJ stack is then patterned to form a MTJ device. Because the seed layer was patterned before the MTJ patterning step, the exposure of the device to etching plasma gases is shortened and thus, etch damage is minimized.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: May 15, 2018
    Assignee: Headway Technologies, Inc.
    Inventors: Jesmin Haq, Tom Zhong, Zhongjian Teng, Dongna Shen
  • Patent number: 9935261
    Abstract: A magnetic device for magnetic random access memory (MRAM), spin torque MRAM, or spin torque oscillator technology is disclosed wherein a perpendicularly magnetized magnetic tunnel junction (p-MTJ) with a sidewall is formed between a bottom electrode and a top electrode. A first dielectric layer is 3 to 400 Angstroms thick, and formed on the p-MTJ sidewall with a physical vapor deposition RF sputtering process to establish a thermally stable interface with the p-MTJ up to temperatures around 400° C. during CMOS fabrication. The first dielectric layer may comprise one or more of B, Ge, and alloys thereof, and an oxide, nitride, carbide, oxynitride, or carbonitride. The second dielectric layer is up to 2000 Angstroms thick and may be one or more of SiOYNZ, AlOYNZ, TiOYNZ, SiCYNZ, or MgO where y+z>0.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: April 3, 2018
    Assignee: Headway Technologies, Inc.
    Inventors: Sahil Patel, Ru-Ying Tong, Dongna Shen, Yu-Jen Wang, Vignesh Sundar
  • Patent number: 9887350
    Abstract: A hard mask stack for etching a magnetic tunneling junction (MTJ) structure is described. An electrode layer is deposited on a stack of MTJ layers on a bottom electrode. A photoresist mask is formed on the electrode layer. The electrode layer is etched away where it is not covered by the photoresist mask to form a metal hard mask. The metal hard mask is passivated during or after etching to form a smooth hard mask profile. Thereafter, the photoresist mask is removed and the MTJ structure is etched using the metal hard mask wherein the metal hard mask remaining acts as a top electrode. The resulting MTJ device has smooth sidewalls and uniform device shape.
    Type: Grant
    Filed: May 31, 2015
    Date of Patent: February 6, 2018
    Assignee: Headway Technologies, Inc.
    Inventors: Dongna Shen, Yu-Jen Wang, Jesmin Haq
  • Patent number: 9871195
    Abstract: A stack of MTJ layers is provided on a substrate comprising a bottom electrode, a pinned layer, a tunnel barrier layer, a free layer, and a top electrode. The MTJ stack is patterned to form a MTJ device wherein sidewall damage is formed on its sidewalls. A dielectric spacer is formed on the MTJ device. The dielectric spacer is etched away on horizontal surfaces wherein the dielectric spacer on the sidewalls is partially etched away. The remaining dielectric spacer covers the pinned layer and bottom electrode. The dielectric spacer is removed from the free layer or is thinner on the free layer than on the pinned layer and bottom electrode. Sidewall damage is thereafter removed from the free layer by applying a horizontal etching to the MTJ device wherein the pinned layer and bottom electrode are protected from etching by the dielectric spacer layer.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: January 16, 2018
    Assignee: Headway Technologies, Inc.
    Inventors: Yi Yang, Dongna Shen, Yu-Jen Wang
  • Patent number: 9660177
    Abstract: An improved method for etching a magnetic tunneling junction (MTJ) structure is achieved. A stack of MTJ layers is provided on a bottom electrode. The MTJ stack is patterned to form a MTJ device wherein sidewall damage or sidewall redeposition is formed on sidewalls of the MTJ device. A dielectric layer is deposited on the MTJ device and the bottom electrode. The dielectric layer is etched away using ion beam etching at an angle relative to vertical of greater than 50 degrees wherein the dielectric layer on the sidewalls is etched away and wherein sidewall damage or sidewall redeposition is also removed and wherein some of the dielectric layer remains on horizontal surfaces of the bottom electrode.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: May 23, 2017
    Assignee: Headway Technologies, Inc.
    Inventors: Rao Annapragada, Yu-Jen Wang, Dongna Shen
  • Patent number: 9608200
    Abstract: A hard mask stack for etching a magnetic tunneling junction (MTJ) structure is described. The hard mask stack is formed on a stack of MTJ layers on a bottom electrode and comprises an electrode layer on the MTJ stack, a buffer metal layer on the electrode layer, a metal hard mask layer on the buffer metal layer, and a dielectric layer on the metal hard mask layer wherein a dielectric mask is defined in the dielectric layer by a photoresist mask, a metal hard mask is defined in the metal hard mask layer by the dielectric mask, a buffer metal mask is defined in the buffer metal layer by the metal hard mask, an electrode mask is defined in the electrode layer by the buffer metal mask, and the MTJ structure is defined by the electrode mask wherein the electrode mask remaining acts as a top electrode.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: March 28, 2017
    Assignee: Headway Technologies, Inc.
    Inventors: Dongna Shen, Yu-Jen Wang, Tom Zhong
  • Publication number: 20170069834
    Abstract: An improved method for etching a magnetic tunneling junction (MTJ) structure is achieved. A stack of MTJ layers is provided on a bottom electrode. The MTJ stack is patterned to form a MTJ device wherein sidewall damage or sidewall redeposition is formed on sidewalls of the MTJ device. A dielectric layer is deposited on the MTJ device and the bottom electrode. The dielectric layer is etched away using ion beam etching at an angle relative to vertical of greater than 50 degrees wherein the dielectric layer on the sidewalls is etched away and wherein sidewall damage or sidewall redeposition is also removed and wherein some of the dielectric layer remains on horizontal surfaces of the bottom electrode.
    Type: Application
    Filed: September 9, 2015
    Publication date: March 9, 2017
    Inventors: Rao Annapragada, Yu-Jen Wang, Dongna Shen
  • Publication number: 20160351798
    Abstract: A hard mask stack for etching a magnetic tunneling junction (MTJ) structure is described. An electrode layer is deposited on a stack of MTJ layers on a bottom electrode. A photoresist mask is formed on the electrode layer. The electrode layer is etched away where it is not covered by the photoresist mask to form a metal hard mask. The metal hard mask is passivated during or after etching to form a smooth hard mask profile. Thereafter, the photoresist mask is removed and the MTJ structure is etched using the metal hard mask wherein the metal hard mask remaining acts as a top electrode. The resulting MTJ device has smooth sidewalls and uniform device shape.
    Type: Application
    Filed: May 31, 2015
    Publication date: December 1, 2016
    Inventors: Dongna Shen, Yu-Jen Wang, Jesmin Haq
  • Publication number: 20160284985
    Abstract: A hard mask stack for etching a magnetic tunneling junction (MTJ) structure is described. The hard mask stack is formed on a stack of MTJ layers on a bottom electrode and comprises an electrode layer on the MTJ stack, a buffer metal layer on the electrode layer, a metal hard mask layer on the buffer metal layer, and a dielectric layer on the metal hard mask layer wherein a dielectric mask is defined in the dielectric layer by a photoresist mask, a metal hard mask is defined in the metal hard mask layer by the dielectric mask, a buffer metal mask is defined in the buffer metal layer by the metal hard mask, an electrode mask is defined in the electrode layer by the buffer metal mask, and the MTJ structure is defined by the electrode mask wherein the electrode mask remaining acts as a top electrode.
    Type: Application
    Filed: March 27, 2015
    Publication date: September 29, 2016
    Inventors: Dongna Shen, Yu-Jen Wang, Tom Zhong