Abstract: A pixel circuit includes a driving circuit, a first control circuit and a second control circuit. The driving circuit is configured to receive a data signal in response to a scan signal, and generate, in response to a first enable signal, a driving signal according to a first voltage and the data signal. The first control circuit is configured to: receive a first input signal in response to a first control signal, and transmit a third input signal in response to the first input signal; and receive a second input signal in response to a second control signal, and transmit a second enable signal in response to the second input signal. The second control circuit is configured to transmit the driving signal to an element to be driven in response to one of the third input signal and the second enable signal.

Abstract: An array substrate is provided. The array substrate includes a data line; a first voltage supply line; a second voltage supply line; and a pixel driving circuit. The pixel driving circuit includes one or more transistors in a first group and one or more transistors in a second group. A source electrode and a drain electrode of at least one transistor in the first group, the data line, the first voltage supply line, and the second voltage supply line are in a same layer. A source electrode and a drain electrode of at least one transistor in the second group are in a layer different from the first voltage supply line and the second voltage supply line.

Abstract: A shift register (SR) includes a voltage control circuit (110) and a bias compensation circuit (120). The voltage control circuit (110) is configured to control a voltage at a first node (Output) to be a first voltage or a second voltage. The bias compensation circuit (120) is configured to: when the voltage at the first node (Output) is the first voltage, transmit a first signal received by a first signal terminal (VDD-A) to a first signal output terminal (EM1), and transmit a second signal received by a second signal terminal (VDD-B) to a second signal output terminal (EM2); and in response to the voltage at the first node (Output) being the second voltage, transmit a signal received by a first voltage terminal (LVGL1) to the first signal output terminal (EM1) and the second signal output terminal (EM2).

Abstract: The present disclosure relates to the field of display technologies, and in particular, to a shift register circuit and a display device. The shift register circuit may include a plurality of GOAs for outputting scan signals to a plurality of pixel driving circuits and a plurality of EOAs for outputting control signals to the plurality of pixel driving circuits, where the GOAs and the EOAs are alternately arranged in a straight line.

Abstract: The present disclosure provides a pixel circuit including: a current control circuit and a time control circuit, the time control circuit includes: a first resetting sub-circuit configured to write a reference voltage and a first initialization voltage to a first node and a second node, respectively; a first data writing sub-circuit configured to write a first data voltage to the first node; a first threshold compensation sub-circuit configured to perform threshold compensation on a transistor within a switch sub-circuit; a ramp writing sub-circuit configured to write a preset ramp signal to the first node; and the switch sub-circuit configured to control electrical coupling and decoupling between a third node and a fourth node. The present disclosure further provides a driving method of the pixel circuit and a display device.

Abstract: A pixel driving circuit includes a driving signal control sub-circuit and a driving duration control sub-circuit. The driving signal control sub-circuit is configured to provide a driving signal to the driving duration control sub-circuit under control of a first scanning signal terminal and a enable signal terminal. The driving signal is related to a first data signal received at a first data signal terminal and a first voltage signal received at a first voltage signal terminal. The driving duration control sub-circuit is configured to transmit the driving signal to the element to be driven under control of a second scanning signal terminal and a enable signal terminal. A duration for which the driving signal is transmitted to the element to be driven is related to a second data signal received at a second data signal terminal.

Abstract: The present disclosure provides a pixel driving circuit and a display panel. The pixel driving circuit includes: a data writing sub-circuit configured to transmit a data voltage signal to a first terminal of a driving sub-circuit in response to a first scanning signal; a threshold compensation sub-circuit configured to compensate for a threshold voltage of the driving sub-circuit in response to a second scanning signal; a storage sub-circuit configured to store the data voltage signal; the driving sub-circuit configured to provide a driving current for a light emitting device to be driven according to voltages of a first terminal and a control terminal of the driving sub-circuit; and a voltage maintaining sub-circuit configured to maintain the voltage of the control terminal of the driving sub-circuit when the voltage of the first terminal of the driving sub-circuit jumps.

Abstract: A pixel circuit includes a current control sub-circuit, a combined light emitting sub-circuit, and a first light emitting element to an Nth light emitting element, N being a natural number greater than 1. The current control sub-circuit is configured to receive a display data signal and a light emitting control signal, control whether to generate a driving current according to the light emitting control signal, and control a current intensity of the generated driving current according to the display data signal. The combined light emitting sub-circuit is configured to receive the driving current and a first light emitting data signal to an Nth light emitting data signal and drive one or more of the first light emitting element to the Nth light emitting element to emit light according to the first light emitting data signal to the Nth light emitting data signal.

Abstract: A drive back plate is provided. The drive back plate includes a base substrate, and a drive circuit and a bonding structure disposed on the base substrate. The drive circuit includes a target drive structure, and a film layer disposed on at least one side of the target drive structure and adjacent to the target drive structure in the drive back plate is an inorganic insulating layer. The bonding structure is disposed on the same layer as the target drive structure, and the material of the bonding structure is the same as the material of the target drive structure.

Abstract: A pixel driving circuit includes a data writing sub-circuit, a driving sub-circuit, and a control sub-circuit. The data writing sub-circuit is configured to: in response to a first scanning signal and a third scanning signal, write a first data signal into the driving sub-circuit; and in response to a second scanning signal and the third scanning signal, write a second data signal into the driving sub-circuit. The control sub-circuit is configured to, in response to an enable signal, connect a driving transistor to a first power supply voltage signal terminal and an element to be driven. The driving sub-circuit is configured to: according to the first data signal and a first power supply voltage signal, output a driving to signal; and according to the second data signal and the first power supply voltage signal, control an operating state of the element to be driven.

Abstract: A driving backplane, a display panel and a display device are disclosed. The driving backplane includes: a base substrate; a plurality of pixel driving circuits located on the base substrate; an electrode located on a side of each of the pixel driving circuits facing away from the base substrate and coupled with the pixel driving circuits; and a potential wire located between the electrode and the base substrate and coupled with the pixel driving circuits. Every at least two pixel driving circuits are coupled with a same signal line through a multiplexing controller, an orthographic projection of the controller on the base substrate completely falls into a range of a corresponding micro light emitting diode bonding region, and an orthographic projection of a control wire coupled with the controller on the base substrate completely falls into a range of an orthographic projection of the potential wire on the base substrate.

Abstract: A pixel circuit and a method of driving the same, and a display device. The pixel circuit includes a plurality of pixel compensation circuits, and each pixel compensation circuit can be connected to M light-emitting units located in the same column. Each light-emitting control signal terminal of the M light-emitting control signal terminals included in each light-emitting control signal terminal group may be connected to a pixel compensation circuit group (i.e., K rows of pixels compensation circuits).

Abstract: The present application provides a pixel circuit, a pixel driving method and a display device. The pixel circuit is to be coupled to a to-be-driven element. The pixel circuit includes a first energy storage circuit, a driving circuit, a light-emitting control circuit, a data writing circuit, and a compensation control circuit. The compensation control circuit is configured to, under control of a third control signal, control conduction between the first node and the first terminal of the driving circuit, and control conduction between the second node and the second terminal of the driving circuit.

Abstract: Disclosed is an array substrate including multiple first selection circuits with each including at least two first selection transistors and at least two first anticreeping transistors. Each first selection transistor is connected with one first anticreeping transistor in series. When the first selection transistor is turned on by a first turn-on signal from a first control signal terminal, the first anticreeping transistor is turned on by a second turn-on signal from a second control signal terminal. When the first selection transistor is turned off by a first turn-off signal from the first control signal terminal, the first anticreeping transistor is turned off to make the first selection transistors and the data signal terminal disconnected, by a second turn-off signal from the second control signal terminal. A voltage of the first turn-off signal is greater than a voltage of the second turn-off signal.

Abstract: An array substrate includes pixel group(s) and pixel circuit group(s), each pixel group includes pixels, and each pixel includes sub-pixel(s). At least two pixel groups are arranged in a row direction; in a column direction, a length of a pixel group is greater than a length of a pixel circuit group electrically connected thereto; and orthographic projections of a sub-pixel and a pixel circuit group electrically connected to a pixel group to which the sub-pixel belongs on a plane does not overlap. Or, the at least two pixel groups are arranged in the column direction; in the row direction, a length of a pixel group is greater than a length of a pixel circuit group electrically connected thereto; and orthographic projections of a sub-pixel and a pixel circuit group electrically connected to a pixel group to which the sub-pixel belongs on another plane does not overlap.

Abstract: A pixel circuit includes an input circuit and a time control circuit. The input circuit includes a driving transistor, and the input circuit is configured to write a data signal into a gate of the driving transistor in response to a first gate signal, so that the driving transistor outputs a driving signal for driving an element to be driven to emit light according to a gate voltage and a source voltage thereof. The time control circuit is coupled to the input circuit and the element to be driven, and is configured to control the input circuit to transmit the driving signal to the element to be driven for a first duration, and control the input circuit to transmit the driving signal to the element to be driven for a second duration. The second duration is shorter than the first duration, and includes a plurality of phases spaced apart.

Abstract: Provided are a display structure and a preparation method thereof, and a display apparatus. The display structure includes a flexible back plate and a display substrate which are stacked, the flexible back plate including a bonding electrode for bonding to an integrated circuit chip, and the flexible back plate being bent to form a bent portion on which the bonding electrode is located.

Abstract: A display panel is provided. The display panel includes a base substrate and a plurality of display units disposed on the base substrate. The display unit includes a signal line, a light-emitting device and a drive unit. The light-emitting device is disposed in a flexible display region of the base substrate, the drive unit is disposed in a pixel circuit region of the base substrate, and the signal line is connected with the light-emitting device and the drive unit.

Abstract: The present disclosure provides a driving backplane, a display panel and a display device. The driving backplane comprises: a base substrate having a plurality of first conductive vias; a pixel circuit layer disposed on the base substrate and comprising a plurality of pixel circuits and a plurality of signal lines; a conductive portion, at least part of which is disposed in one first conductive via; a conductive pattern layer disposed on the base substrate and comprising a plurality of first conductive patterns; and a shielding layer disposed between the pixel circuit layer and the conductive pattern layer and having a plurality of hollow areas; wherein each of the plurality of signal lines is coupled to one first conductive pattern through at least one of the conductive portions.

Abstract: The present disclosure discloses a light-emitting substrate, a method for forming the light-emitting substrate and a display device. The light-emitting substrate includes: a base substrate; a first signal line located at one side of the base substrate; an insulation layer located at one side of the first signal line away from the base substrate; an electrode layer located at one side of the insulation layer away from the base substrate and including a first electrode terminal, a second electrode terminal and a second signal line, where the first electrode terminal is electrically connected to the first signal line via a first through hole penetrating the insulation layer; and at least one light-emitting element bound and connected to the first electrode terminal and the second electrode terminal.