Patents by Inventor Dongping Zhang
Dongping Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11704277Abstract: Systems and methods for efficiently routing qubits in a quantum computing system include selecting bubble nodes and routing qubits to the bubble nodes. The systems and methods further include dividing a system of nodes into regions and selecting a bubble node for each region. The systems and methods further include using super bubble nodes with reliable links connected to other super bubble nodes and bubble nodes to improve cross-region operations.Type: GrantFiled: December 16, 2019Date of Patent: July 18, 2023Assignee: Advanced Micro Devices, Inc.Inventors: Majed Valad Beigi, Yasuko Eckert, Dongping Zhang
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Patent number: 11147350Abstract: A modular structure of an interior assembly relates to the field suitcases. A first snap-fit groove is provided around an outer side of a middle frame, and an opening of the first snap-fit groove is provided downward. A second snap-fit groove is provided around an inner side of the middle frame, a first protrusion and a sliding member are provided in the second snap-fit groove, and an opening of the second snap-fit groove is provided upward. An upper end of a shell is snap-fitted into the first snap-fit groove to be combined with the middle frame, and the card is combined with the inner assembled structure. Subsequently, the card is inserted into the second snap-fit groove, the second protrusion fixes the card in the second snap-fit groove through the sliding member and the first protrusion, and the step-like member and the sliding member are fixed by a snap-fit connection.Type: GrantFiled: June 12, 2019Date of Patent: October 19, 2021Assignee: ANHUI KORRUN CO., LTDInventors: Ruping Ruan, Jidong Yang, Xuan Feng, Lili Jiang, Dongping Zhang, Shichang Mao, Zhixin Liu, Su Zhang, Jinsong Fan
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Publication number: 20210182234Abstract: Systems and methods for efficiently routing qubits in a quantum computing system include selecting bubble nodes and routing qubits to the bubble nodes. The systems and methods further include dividing a system of nodes into regions and selecting a bubble node for each region. The systems and methods further include using super bubble nodes with reliable links connected to other super bubble nodes and bubble nodes to improve cross-region operations.Type: ApplicationFiled: December 16, 2019Publication date: June 17, 2021Applicant: Advanced Micro Devices, Inc.Inventors: Majed Valad Beigi, Yasuko Eckert, Dongping Zhang
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Patent number: 10697487Abstract: A device for automatically assembling a shell and a middle frame by glue includes a locating mechanism of the middle frame, a glue coating mechanism, a feed mechanism, a press-in mechanism, and a pressure-keeping mechanism. Components to be assembled are transferred among the locating mechanism of the middle frame, the glue coating mechanism, the feed mechanism, the press-in mechanism, and the pressure-keeping mechanism through manipulators. An automatic assembly line is formed by the device to assemble various components of the case body, which considerably reduces the manual assembly cost, simplifies the complicated assembly process, effectively shortens the whole production period, and improves the production efficiency.Type: GrantFiled: June 11, 2019Date of Patent: June 30, 2020Assignee: SHANGHAI RUNMI TECHNOLOGY CO., LTDInventors: Ruping Ruan, Jidong Yang, Xuan Feng, Lili Jiang, Yiran Qian, Shichang Mao, Dongping Zhang, Zhixin Liu, Su Zhang, Jinsong Fan
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Publication number: 20200000197Abstract: A modular structure of an interior assembly relates to the field suitcases. A first snap-fit groove is provided around an outer side of a middle frame, and an opening of the first snap-fit groove is provided downward. A second snap-fit groove is provided around an inner side of the middle frame, a first protrusion and a sliding member are provided in the second snap-fit groove, and an opening of the second snap-fit groove is provided upward. An upper end of a shell is snap-fitted into the first snap-fit groove to be combined with the middle frame, and the card is combined with the inner assembled structure. Subsequently, the card is inserted into the second snap-fit groove, the second protrusion fixes the card in the second snap-fit groove through the sliding member and the first protrusion, and the step-like member and the sliding member are fixed by a snap-fit connection.Type: ApplicationFiled: June 12, 2019Publication date: January 2, 2020Applicant: Anhui Korrun Co., LtdInventors: Ruping RUAN, Jidong YANG, Xuan FENG, Lili JIANG, Dongping ZHANG, Shichang MAO, Zhixin LIU, Su ZHANG, Jinsong FAN
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Publication number: 20190383317Abstract: A device for automatically assembling a shell and a middle frame by glue includes a locating mechanism of the middle frame, a glue coating mechanism, a feed mechanism, a press-in mechanism, and a pressure-keeping mechanism. Components to be assembled are transferred among the locating mechanism of the middle frame, the glue coating mechanism, the feed mechanism, the press-in mechanism, and the pressure-keeping mechanism through manipulators. An automatic assembly line is formed by the device to assemble various components of the case body, which considerably reduces the manual assembly cost, simplifies the complicated assembly process, effectively shortens the whole production period, and improves the production efficiency.Type: ApplicationFiled: June 11, 2019Publication date: December 19, 2019Applicant: Shanghai Runmi Technology Co.,LtdInventors: Ruping RUAN, Jidong YANG, Xuan FENG, Lili JIANG, Yiran QIAN, Shichang MAO, Dongping ZHANG, Zhixin LIU, Su ZHANG, Jinsong FAN
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Patent number: 9899334Abstract: A method includes: growing a oxide layer on a topside of a semiconductor wafer using a local oxidation of silicon (LOCOS) process; forming a photoresist pattern with an alignment opening on the oxide layer; etching the oxide layer to form a trench in the oxide layer; etching an alignment mark trench into the exposed surface of the semiconductor wafer; depositing a dielectric layer that is one of a silicon nitride material or a silicon oxynitride material; performing an anisotropic plasma etch to remove the dielectric layer from horizontal surfaces on the oxide layer and the alignment mark trench and to form sidewalls from the dielectric layer on vertical sidewalls of the alignment mark trench; growing an alignment mark oxide layer on a bottom surface of the alignment trench; and etching and removing the oxide layer and the alignment mark oxide layer.Type: GrantFiled: December 27, 2016Date of Patent: February 20, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Fuchao Wang, Prakash Dalpatbhai Dev, Dina Rodriguez, Dongping Zhang, Billy Alan Wofford
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Patent number: 9851945Abstract: Methods and systems of reducing power transmitted over a memory to cache bus having a plurality of cache lines by identifying floating point numbers transmitted over a cache line, rounding bits in least significant bit (LSB) positions of identified floating point (FP) numbers to a uniform binary value string, mapping the rounded bits from the LSB positions to most significant bit (MSB) positions of each FP number to increase a chance of matching bit patterns between pairs of the FP numbers, and compressing the floating point numbers by replacing matched bit patterns with smaller data elements using a defined data compression process. A decompressor decompresses the compressed FP numbers using a defined decompression process corresponding to the defined compression process; and the mapping component applies a reverse mapping function to map the rounded bits back to original LSB positions from the MSB positions to recover the original floating point numbers.Type: GrantFiled: February 16, 2015Date of Patent: December 26, 2017Assignee: Advanced Micro Devices, Inc.Inventors: Nam Duong, Elliot Mednick, DongPing Zhang
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Patent number: 9634221Abstract: A method of manufacturing a thin-film thermo-electric generator includes the steps of: forming two or more PN junctions each having a three-layer structure; forming a substrate which has a first side and an opposed second side; coupling the PN junctions at the first side of the substrate to define a first group of PN junctions at the first side of the substrate; and providing two electrodes that one of the electrodes is extracted from the first group of PN junctions. Accordingly, each of the PN junctions is formed by depositing an insulating thin-film layer between a P-type thermo-electric thin-film layer and a N-type thermo-electric thin-film layer.Type: GrantFiled: December 18, 2015Date of Patent: April 25, 2017Assignee: SHENZHEN UNIVERSITYInventors: Ping Fan, Dongping Zhang, Zhuanghao Zheng, Guangxing Liang
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Publication number: 20160239265Abstract: Methods and systems of reducing power transmitted over a memory to cache bus having a plurality of cache lines by identifying floating point numbers transmitted over a cache line, rounding bits in least significant bit (LSB) positions of identified floating point (FP) numbers to a uniform binary value string, mapping the rounded bits from the LSB positions to most significant bit (MSB) positions of each FP number to increase a chance of matching bit patterns between pairs of the FP numbers, and compressing the floating point numbers by replacing matched bit patterns with smaller data elements using a defined data compression process. A decompressor decompresses the compressed FP numbers using a defined decompression process corresponding to the defined compression process; and the mapping component applies a reverse mapping function to map the rounded bits back to original LSB positions from the MSB positions to recover the original floating point numbers.Type: ApplicationFiled: February 16, 2015Publication date: August 18, 2016Inventors: Nam Duong, Elliot Mednick, DongPing Zhang
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Publication number: 20160104830Abstract: A method of manufacturing a thin-film thermo-electric generator includes the steps of: forming two or more PN junctions each having a three-layer structure; forming a substrate which has a first side and an opposed second side; coupling the PN junctions at the first side of the substrate to define a first group of PN junctions at the first side of the substrate; and providing two electrodes that one of the electrodes is extracted from the first group of PN junctions. Accordingly, each of the PN junctions is formed by depositing an insulating thin-film layer between a P-type thermo-electric thin-film layer and a N-type thermo-electric thin-film layer.Type: ApplicationFiled: December 18, 2015Publication date: April 14, 2016Inventors: Ping FAN, Dongping ZHANG, Zhuanghao ZHENG, Guangxing LIANG
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Patent number: 9299907Abstract: For the thin-film thermo-electric generator and fabrication method of this invention, a P-type thermo-electric thin-film layer, an insulating thin-film layer and a N-type thermo-electric thin-film layer is deposited on a substrate to form a three-layer PN junction, multiple three-layer PN junctions in series are available, an insulating thin-film layer is provided between every to serial three-layer PN junctions, and electrodes are extracted from the substrate and the outermost thin-film layer of the last three-layer thin-film PN junctions.Type: GrantFiled: December 9, 2009Date of Patent: March 29, 2016Assignee: ShenZhen UniversityInventors: Ping Fan, Dongping Zhang, Zhuangghao Zjemg, Guangxing Liang
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Patent number: 9262139Abstract: A method, a system, and a non-transitory computer readable medium for parallelizing computer program code including a loop are presented. An intermediate language version of the computer program code is generated based on a parallel type of the loop, wherein the intermediate language version includes information about parallelism in the computer program code. The intermediate language version is optimized at runtime based on the device characteristics where the computer program code is to be executed. The parallel type may include a thread parallel type, wherein the loop is dispatched to multiple threads for execution, or a general parallel type, wherein the loop is dispatched to a single thread and may be vectorized for execution. The intermediate language version may be saved separate from the computer program code.Type: GrantFiled: January 7, 2013Date of Patent: February 16, 2016Assignee: ADVANCED MICRO DEVICES, INC.Inventors: Lee W. Howes, Dongping Zhang
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Patent number: 9240034Abstract: Methods and apparatus for biomedical data analysis to produce enhanced images of tubular structures are disclosed. A Gaussian convolution of an input image is used to calculate a Hessian matrix. An Eigen decomposition of the Hessian matrix produces eigenvectors and eigenvalues, which are sorted to determine bright tubular structure detection according to high and low values that represent brightness, and structure shape. A tubularity computation calculates the probability of a voxel of interest being part of a tubular network. Embodiments may be implemented to share computer resources such as between a computer processing unit (CPU) and a graphic processing unit (GPU).Type: GrantFiled: June 4, 2013Date of Patent: January 19, 2016Assignee: Advanced Micro Devices, Inc.Inventor: Dongping Zhang
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Publication number: 20140196016Abstract: A method, a system, and a non-transitory computer readable medium for parallelizing computer program code including a loop are presented. An intermediate language version of the computer program code is generated based on a parallel type of the loop, wherein the intermediate language version includes information about parallelism in the computer program code. The intermediate language version is optimized at runtime based on the device characteristics where the computer program code is to be executed. The parallel type may include a thread parallel type, wherein the loop is dispatched to multiple threads for execution, or a general parallel type, wherein the loop is dispatched to a single thread and may be vectorized for execution. The intermediate language version may be saved separate from the computer program code.Type: ApplicationFiled: January 7, 2013Publication date: July 10, 2014Applicant: ADVANCED MICRO DEVICES, INC.Inventors: Lee W. Howes, Dongping Zhang
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Publication number: 20130329972Abstract: Methods and apparatus for biomedical data analysis to produce enhanced images of tubular structures are disclosed. A Gaussian convolution of an input image is used to calculate a Hessian matrix. An Eigen decomposition of the Hessian matrix produces eigenvectors and eigenvalues, which are sorted to determine bright tubular structure detection according to high and low values that represent brightness, and structure shape. A tubularity computation calculates the probability of a voxel of interest being part of a tubular network. Embodiments may be implemented to share computer resources such as between a computer processing unit (CPU) and a graphic processing unit (GPU).Type: ApplicationFiled: June 4, 2013Publication date: December 12, 2013Inventor: Dongping Zhang
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Publication number: 20110197942Abstract: For the thin-film thermo-electric generator and fabrication method of this invention, a P-type thermo-electric thin-film layer, an insulating thin-film layer and a N-type thermo-electric thin-film layer is deposited on a substrate to form a three-layer PN junction, multiple three-layer PN junctions in series are available, an insulating thin-film layer is provided between every to serial three-layer PN junctions, and electrodes are extracted from the substrate and the outermost thin-film layer of the last three-layer thin-film PN junctions.Type: ApplicationFiled: December 9, 2009Publication date: August 18, 2011Applicant: SHENZHEN UNIVERSITYInventors: Ping Fan, Dongping Zhang, Zhuangghao Zjemg, Guangxing Liang