Patents by Inventor Dong-Sik Jeong

Dong-Sik Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11953596
    Abstract: A light detection and ranging (lidar) device includes: a lower base; an upper base; a laser emitting unit for emitting a laser in a form of a point light source; a nodding mirror for transforming the laser in the form of the point light source to a line beam pattern which is perpendicular to the lower base, wherein the nodding mirror reflects the laser emitted from the laser emitting unit; a polygonal mirror for transforming the line beam pattern to a plane beam pattern and receiving a laser reflected from an object; and a sensor unit for receiving the laser reflected from the object via the polygonal mirror.
    Type: Grant
    Filed: September 21, 2022
    Date of Patent: April 9, 2024
    Assignee: SOS Lab Co., Ltd.
    Inventors: Ji Seong Jeong, Jun Hwan Jang, Dong Kyu Kim, Sung Ui Hwang, Gyeong Hwan Shin, Bum Sik Won
  • Patent number: 11932140
    Abstract: Disclosed is a cushion tip-up type seat for a vehicle. The cushion tip-up type seat for a vehicle is configured to perform a tip-up function of a cushion part, and to move a seat leftward and rightward to adjust an interval between left and right seats, whereby left and right spacing between occupants seated in the seats is sufficiently secured and the convenience of the occupants is improved.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: March 19, 2024
    Assignees: Hyundai Motor Company, Kia Corporation, Hyundai Transys Inc.
    Inventors: Dong Woo Jeong, Eun Sue Kim, Dae Hee Lee, Myung Hoe Kim, Jun Sik Hwang, Gwon Hwa Bok, Hae Dong Kwak, Jae Sung Shin, Han Kyung Park, Jae Hoon Cho
  • Publication number: 20220262718
    Abstract: Methods, systems, and apparatus for reducing power consumption or signal distortions in a semiconductor device package. The semiconductor device package includes a semiconductor device, a first electric path, a second electric path, and an isolation element in the first electric path. The second electric path is electrically connected to the first electric path and a functional unit of the device. The isolation element separates an isolated portion in the first electric path from the second electric path, where the isolation element is configured to reduce current in the isolated portion when a signal is passing through the second electric path.
    Type: Application
    Filed: March 3, 2022
    Publication date: August 18, 2022
    Inventors: Adrian E. Ong, Dong Sik Jeong
  • Patent number: 11270931
    Abstract: Methods, systems, and apparatus for reducing power consumption or signal distortions in a semiconductor device package. The semiconductor device package includes a semiconductor device, a first electric path, a second electric path, and an isolation element in the first electric path. The second electric path is electrically connected to the first electric path and a functional unit of the device. The isolation element separates an isolated portion in the first electric path from the second electric path, where the isolation element is configured to reduce current in the isolated portion when a signal is passing through the second electric path.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: March 8, 2022
    Assignee: Rambus Inc.
    Inventors: Adrian E. Ong, Dong Sik Jeong
  • Publication number: 20180254241
    Abstract: Methods, systems, and apparatus for reducing power consumption or signal distortions in a semiconductor device package. The semiconductor device package includes a semiconductor device, a first electric path, a second electric path, and an isolation element in the first electric path. The second electric path is electrically connected to the first electric path and a functional unit of the device. The isolation element separates an isolated portion in the first electric path from the second electric path, where the isolation element is configured to reduce current in the isolated portion when a signal is passing through the second electric path.
    Type: Application
    Filed: February 9, 2018
    Publication date: September 6, 2018
    Inventors: Adrian E. Ong, Dong Sik Jeong
  • Patent number: 9899312
    Abstract: Methods, systems, and apparatus for reducing power consumption or signal distortions in a semiconductor device package. The semiconductor device package includes a semiconductor device, a first electric path, a second electric path, and an isolation element in the first electric path. The second electric path is electrically connected to the first electric path and a functional unit of the device. The isolation element separates an isolated portion in the first electric path from the second electric path, where the isolation element is configured to reduce current in the isolated portion when a signal is passing through the second electric path.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: February 20, 2018
    Assignee: Rambus Inc.
    Inventors: Adrian E. Ong, Dong Sik Jeong
  • Patent number: 9776591
    Abstract: The invention relates to an actuator subassembly for a vehicle safety system having a pin release actuator unit and a cradle bracket for holding the actuator unit and attaching to an airbag module. Further the invention relates to an airbag module with said actuator subassembly and a method of mounting a releasable tether on an airbag module by means of said actuator subassembly.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: October 3, 2017
    Assignee: Key Safety Systems, Inc.
    Inventors: Dong Sik Jeong, Chang-Hwan Ju, Bryan Thomas, Ho-Won Lee, K. S. Lee, Jae-Ik Hwang
  • Patent number: 9046164
    Abstract: Disclosed is a shift lever for a vehicle transmission, which includes a rod provided in a mounting space to move linearly and having an upper part having an upper inclined surface and successive engaging grooves. An engaging protrusion is provided on an inner wall of a support section such that, when the rod moves, the engaging protrusion is engaged with one of the engaging grooves to afford a brisk, clear operation action when changing gears. A button is provided such that one end thereof extends to the inclined surface of the upper part of the rod, and another end thereof is exposed to the outside to enable that end to be pressed down to push the rod down.
    Type: Grant
    Filed: July 1, 2013
    Date of Patent: June 2, 2015
    Assignees: HYUNDAI MOTOR COMPANY, KIA MOTORS CORP.
    Inventors: Jee Hyuck Choi, Eun Sik Kim, Jeong Seon Min, Hee Soo Yang, Bum Jun Kim, Yang Rae Cho, Dong Sik Jeong
  • Patent number: 8817568
    Abstract: A memory array comprises a plurality of memory cells arranged in a plurality of rows and a plurality of columns. A column of the plurality of columns includes a first voltage circuit coupled to internal first nodes of memory cells in the one of the plurality of columns and a second voltage circuit coupled to internal second nodes of the memory cells in the one of the plurality of columns. The first voltage circuit is configured to provide one of a first supply voltage and a second supply voltage lower than the first supply voltage to the internal first nodes. The second voltage circuit is configured to provide one of a first reference voltage and a second reference voltage higher than the first reference voltage to the internal second nodes.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: August 26, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Derek C. Tao, Kuoyuan (Peter) Hsu, Dong Sik Jeong, Young Suk Kim, Young Seog Kim, Yukit Tang
  • Publication number: 20140216196
    Abstract: A non-contact shift lock apparatus that includes a coil and a plunger in a housing. More specifically, the plunger moves downward in the housing when power is supplied to the coil. A shift lever locks when the plunger moves downward and unlocks when the plunger moves upward. Further, when power is supplied to the coil, the plunger is magnetized by a magnetic field and a magnetic force focus is formed at the plunger where a magnetic force is concentrated. The plunger is moved downward by magnetic force balance between a center of the magnetic field generated by the coil and the magnetic force focus, so that the position where the plunger moves downward to is determined by the position where the magnetic force focus is formed.
    Type: Application
    Filed: July 19, 2013
    Publication date: August 7, 2014
    Inventors: Jee-Hyuck Choi, Yang-Rae Cho, Dong-Sik Jeong
  • Publication number: 20140116176
    Abstract: Disclosed is a shift lever for a vehicle transmission, which includes a rod provided in a mounting space to move linearly and having an upper part having an upper inclined surface and successive engaging grooves. An engaging protrusion is provided on an inner wall of a support section such that, when the rod moves, the engaging protrusion is engaged with one of the engaging grooves to afford a brisk, clear operation action when changing gears. A button is provided such that one end thereof extends to the inclined surface of the upper part of the rod, and another end thereof is exposed to the outside to enable that end to be pressed down to push the rod down.
    Type: Application
    Filed: July 1, 2013
    Publication date: May 1, 2014
    Inventors: Jee Hyuck CHOI, Eun Sik KIM, Jeong Seon MIN, Hee Soo YANG, Bum Jun KIM, Yang Rae CHO, Dong Sik JEONG
  • Patent number: 8305827
    Abstract: A memory array comprises a plurality of memory cells arranged in a plurality of rows and a plurality of columns. A column of the plurality of columns includes a first power supply node configured to provide a first voltage, a second power supply node configured to provide a second voltage, and a plurality of internal supply nodes electrically coupled together and configured to receive the first voltage or the second voltage for a plurality of memory cells in the column and a plurality of internal ground nodes. The internal ground nodes are electrically coupled together and configured to provide at least two current paths for the plurality of memory cells in the column.
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: November 6, 2012
    Inventors: Derek C. Tao, Kuoyuan (Peter) Hsu, Dong Sik Jeong, Young Suk Kim, Young Seog Kim, Yukit Tang
  • Publication number: 20120014201
    Abstract: A memory comprising: a plurality of memory cells arranged in a plurality of rows and a plurality of columns. A column of the plurality of columns including a first power supply node configured to provide a first voltage, a second power supply node configured to provide a second voltage, a plurality of internal supply nodes electrically coupled together and configured to receive the first voltage or the second voltage for a plurality of memory cells in the column and a plurality of internal ground nodes. The internal ground nodes electrically coupled together and configured to provide at least two current paths for the plurality of memory cells in the column.
    Type: Application
    Filed: July 13, 2010
    Publication date: January 19, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Derek C. TAO, Kuoyuan (Peter) HSU, Dong Sik JEONG, Young Suk KIM, Young Seog KIM, Yukit TANG
  • Patent number: 6288947
    Abstract: A memory device having a plurality of pipelatch circuits storing data from memory cells via global input/output lines, a pipelatch input control circuit to selectively couple the pipelatch circuit to the global input/output lines in response to a pipelatch control signal, and a pipe count signal generator to control a data path between the pipelatch circuits and an output driver, wherein the pipelatch input control circuit includes: a first control signal generator receiving a first control signal and global input/output line signals and producing a pass gate control signal; a second control signal generator receiving the first control signal and the pass gate control signal and producing a plurality of second control signals; a third control signal generator receiving the pass gate control signal and producing a third control signal by combining the pass gate control signal and a delay signal of the pass gate control signal; and a fourth control signal generator receiving the first control signal, the plural
    Type: Grant
    Filed: June 27, 2000
    Date of Patent: September 11, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Kwan-Weon Kim, Dong-Sik Jeong
  • Patent number: 5936899
    Abstract: A wafer burn-in test circuit of a semiconductor memory device which can provide a burn-in stress voltage by only using a prior word line driver without additional devices or circuits.
    Type: Grant
    Filed: November 5, 1997
    Date of Patent: August 10, 1999
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Dong Sik Jeong
  • Patent number: 5926423
    Abstract: A wafer burn-in circuit for a semiconductor memory device which can detect defected cells in an early stage and increase a yield by applying a stress to bit lines in a wafer state to detect the defected cells and repair the same according to the present invention, is disclosed. To this end, a wafer burn-in circuit for a semiconductor memory device according to the invention includes an equalizing means for bit line for equalizing said bit lines at a standby operation stage, wherein the equalizing means for bit line is controlled by a first precharge signal for bit line. A stress inputting means for bit line is provided to input a stress voltage to the bit lines at a wafer burn-in operation stage, wherein the stress inputting means for bit line is controlled by a second precharge signal for bit line.
    Type: Grant
    Filed: November 5, 1997
    Date of Patent: July 20, 1999
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Dong Sik Jeong
  • Patent number: 5754418
    Abstract: A high voltage generation circuit for a semiconductor memory device comprising a high voltage detector for detecting a high voltage, a ring oscillator for generating a pulse signal in response to an output signal from the high voltage detector when a power-up signal is made active, a high voltage pump circuit for performing a charge pumping operation to generate the high voltage and transfer the generated high voltage to a high voltage output terminal, and a pump controller for controlling the charge pumping operation of the high voltage pump circuit in response to the pulse signal from the ring oscillator.
    Type: Grant
    Filed: October 31, 1996
    Date of Patent: May 19, 1998
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Jin Ho Park, Jae Ik Doh, Dong Sik Jeong
  • Patent number: 5680359
    Abstract: A self-refresh period adjustment circuit for a semiconductor memory device. The self-refresh period adjustment circuit comprises a ring oscillator for generating a pulse signal with a fixed period for a self-refresh operation of the semiconductor memory device, a leakage current detector for detecting the amount of leakage current produced as charges stored in memory cells in the semiconductor memory device are discharged, and at least two temperature detectors for detecting a temperature variation of the semiconductor memory device, each of the at least two temperature detectors including a voltage divider and a comparator. The voltage divider divides a supply voltage and supplies the divided result as a reference signal to the comparator. The comparator compares an output signal from the leakage current detector with the reference signal from the voltage divider.
    Type: Grant
    Filed: March 21, 1996
    Date of Patent: October 21, 1997
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Dong Sik Jeong