Abstract: Provided is a display panel. The display panel is provided with a display region and a peripheral region surrounding the display region, and includes: a substrate; a drive circuit, disposed on the substrate; and a plurality of first signal pins, disposed on the substrate and spaced apart in the peripheral region, wherein the plurality of first signal pins are electrically connected to the drive circuit; wherein the plurality of first signal pins include at least two first pins, the at least two first pins being electrically connected.

Abstract: The present disclosure belongs to the field of displays, and relates to a display panel and a display device. The display panel has a display region and a peripheral region. The display panel comprises a substrate, a driving circuit, and a plurality of first signal pins. The driving circuit is located on the substrate. The plurality of first signal pins are located on the substrate and are arranged at intervals in the peripheral region, and the plurality of first signal pins are electrically connected to the driving circuit. The plurality of first signal pins comprise at least two first pins, and the at least two first pins are electrically connected. Because the at least two first pins are already electrically connected, voltage signals outputted by the at least two first pins to the driving circuit may be balanced, thereby balancing the voltage signals outputted by the driving circuit to a light emitting element, and improving the uniformity and stability of the voltage signals.

Abstract: A multiplexing driving method includes: within an initial time period, applying, by a source driver, an initial voltage to a pre-charging multiplexing switch; within a first charging time period, controlling different non-pre-charging multiplexing switches to be turned on in a time-division manner, so as to write a corresponding grey-scale voltage into corresponding non-pre-charging data lines in a time-division manner via the turned-on non-pre-charging multiplexing switches; and within a second charging time period, controlling, by the gate driving circuit, a corresponding gate line to be turned on; controlling different pre-charging multiplexing switches to be turned on in a time-division manner; and applying, by the source driver, a corresponding grey-scale voltage to the pre-charging multiplexing switches to write the corresponding grey-scale voltage to pixel circuits in a row corresponding to the gate line and electrically connected to the corresponding pre-charging data lines respectively in a time-divi

Abstract: A driving circuit includes at least one pixel circuit and a control circuit. A pixel circuit is configured to write a first data signal in response to a scan signal, and generate a first driving signal according to a first signal and the first data signal. The control circuit is configured to monitor the first driving signal and provide another first data signal to the pixel circuit according to a second data signal and the first driving signal. The pixel circuit is further configured to provide another first driving signal to a light-emitting device according to the first signal and the another first data signal, and in response to an enable signal of the enable signal terminal, provide a second driving signal to the light-emitting device according to a second signal and the another first data signal.

Abstract: A driving circuit includes at least one pixel circuit and a control circuit. A pixel circuit is configured to write a first data signal in response to a scan signal, and generate a first driving signal according to a first signal and the first data signal. The control circuit is configured to monitor the first driving signal and provide another first data signal to the pixel circuit according to a second data signal and the first driving signal. The pixel circuit is further configured to provide another first driving signal to a light-emitting device according to the first signal and the another first data signal, and in response to an enable signal of the enable signal terminal, provide a second driving signal to the light-emitting device according to a second signal and the another first data signal.

Abstract: The present application discloses a pixel driving method, comprising: in a pre-charging phase, turning on a second driving branch to write a preset voltage into a second data line, and then turning off the second driving branch and turning on a first driving branch to write the preset voltage into a first data line; in a first data writing phase, keeping the first driving branch to be turned on to write a first data voltage into the first data line, and then turning off the first driving branch; and in a second data writing phase, turning on the second driving branch to write a second data voltage into the second data line.

Abstract: The present application discloses a pixel driving method, comprising: in a pre-charging phase, turning on a second driving branch to write a preset voltage into a second data line, and then turning off the second driving branch and turning on a first driving branch to write the preset voltage into a first data line; in a first data writing phase, keeping the first driving branch to be turned on to write a first data voltage into the first data line, and then turning off the first driving branch; and in a second data writing phase, turning on the second driving branch to write a second data voltage into the second data line.

Abstract: The present application discloses sampling circuit for voltage compensation in a display apparatus. The sampling circuit includes multiple sampling sub-circuits. Each of the multiple sampling sub-circuits includes an output terminal coupled to a voltage collection port, a control terminal coupled to at least one gate-driving output terminal of a gate-driver-on-array (GOA) circuit for driving the display apparatus, and an input terminal coupled separately to a respective one of a plurality of voltage sampling points in the display apparatus. Each sampling sub-circuit is configured to collect, a voltage signal at the input terminal and transfer the voltage signal via the output terminal to the voltage collection port when the gate-driving output terminal outputs a gate-driving signal.

Abstract: The embodiments of the present disclosure disclose a DC/DC test system and a method. In the solution, based on a test system composed of a test host, a main control unit, a DC/DC unit, a programmable power supply, an input monitoring unit, an output monitoring unit and a load unit, the efficiency test of the DC/DC unit can be automatically realized, the test of linear adjustment rate and load regulation rate can be realized, and the test efficiency can be improved.

Abstract: The present application discloses sampling circuit for voltage compensation in a display apparatus. The sampling circuit includes multiple sampling sub-circuits. Each of the multiple sampling sub-circuits includes an output terminal coupled to a voltage collection port, a control terminal coupled to at least one gate-driving output terminal of a gate-driver-on-array (GOA) circuit for driving the display apparatus, and an input terminal coupled separately to a respective one of a plurality of voltage sampling points in the display apparatus. Each sampling sub-circuit is configured to collect, a voltage signal at the input terminal and transfer the voltage signal via the output terminal to the voltage collection port when the gate-driving output terminal outputs a gate-driving signal.

Abstract: The embodiments of the present disclosure disclose a DC/DC test system and a method. In the solution, based on a test system composed of a test host, a main control unit, a DC/DC unit, a programmable power supply, an input monitoring unit, an output monitoring unit and a load unit, the efficiency test of the DC/DC unit can be automatically realized, the test of linear adjustment rate and load regulation rate can be realized, and the test efficiency can be improved.